1.2nm HfSiON/SiON stacked gate insulators for 65nm-node MISFETs

Saitoh, Motofumi; Ikarashi, Nobuyuki; Watanabe, Heiji; Fujieda, Shinji; Watanabe, H.; Iwamoto, Toshiyuki; Morioka, A.; Ogura, Takashi; Terai, M.; Watanabe, Kôji; Miyamura, Makoto; Tatsumi, Toru; Ikarashi, Taeko; Masuzaki, Koji; Saito, Y.; Yabe, Y.

doi:10.7567/ssdm.2004.b-1-5

Cited by 1 publication

(1 citation statement)

References 0 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Also, with Zr and Hf silicates, phase separation into metal oxides and SiO 2 occurs after high-temperature annealing (phase separator) (3). Nitridation of these silicates was found to improve both the thermal stability and permittivity of the silicate dielectrics (4)(5)(6). In addition, anomalous behavior in the effective work functions of polycrystalline silicon (poly-Si) electrodes caused by Fermi level pinning is a barrier to the development of CMOS devices (7,8).…”

Section: Introductionmentioning

confidence: 99%

Interface Engineering by PVD-Based In-Situ Fabrication Method for Advanced Metal/High-k Gate Stacks

Watanabe¹,

Horie²,

Arimura³

et al. 2007

ECS Trans.

Self Cite

View full text Add to dashboard Cite

We fabricated high-quality silicate gate dielectrics by utilizing a solid phase interface reaction (SPIR) between ultrathin metal layers and SiO 2 underlayers. Metal diffusion to the SiO 2 underlayer forms a high-quality silicate interlayer, and preserving the initial SiO 2 /Si bottom interface ensures good electrical properties. The Hf silicate dielectrics were fabricated by the SPIR method using Hf layers less than 0.5-nm-thick that were fully consumed by interface reactions, resulting in Hf silicate layers that remained amorphous after activation annealing. The superior electrical properties of the poly-Si/HfSixOy/SiO 2 /Si MOSFETs were demonstrated through low leakage current and high electron mobility. We also recently proposed a novel in-situ fabrication method that continuously fabricates high-k dielectrics using SPIR and metal electrodes with a low-damage sputtering system. We investigated structural and electrical properties of metal/high-k gate stacks and demonstrated the effectiveness of the in-situ method in improving electrical properties.

show abstract