2002
DOI: 10.1143/jjap.41.2394
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10–15 nm Ultrashallow Junction Formation by Flash-Lamp Annealing

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Cited by 88 publications
(53 citation statements)
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“…36 As the junction depth in the MLD process is limited by temperature and duration of anneal, the diffusion of As in Si using the MLD method could be further fine-tuned in terms of shallower junction depths by using emerging spike annealing techniques such as flashlamp annealing and laser annealing. [37][38][39] Application of the MLD Strategy to Nanowire Devices…”
Section: Carrier Profilingmentioning
confidence: 99%
“…36 As the junction depth in the MLD process is limited by temperature and duration of anneal, the diffusion of As in Si using the MLD method could be further fine-tuned in terms of shallower junction depths by using emerging spike annealing techniques such as flashlamp annealing and laser annealing. [37][38][39] Application of the MLD Strategy to Nanowire Devices…”
Section: Carrier Profilingmentioning
confidence: 99%
“…This temperature is far above the Si melting point of 1410°C. The limited cluster dissociation leads to poor dopant activation [47][48][49] and, by related mechanisms, to the incomplete removal of EOR defects [49][50][51] commonly observed in microsecond annealing.…”
Section: Fig 7 Data Ofmentioning
confidence: 99%
“…An important element for fabricating transistors for sub 90 nm technologies is reducing poly depletion [7,8]. To provide a shorter annealing time, flash annealing can be used for annealing the poly implant.…”
Section: Application To Cmos Transistorsmentioning
confidence: 99%