140 Gb/s Serializer Using Clock Doublers in 90 nm SiGe Technology

Clarke, Ryan; LeRoy, Mitchell R.; Raman, Srikumar; Neogi, Tuhin Guha; Kraft, R.P.; McDonald, J. F.

doi:10.1109/jssc.2015.2472600

Cited by 5 publications

(3 citation statements)

References 21 publications

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“…6) with a differential voltage swing of 1.2 V pp . While the fastest MUX in SiGe bipolar technology known to the authors achieves up to 160 Gbit/s [7], the reported eye diagram quality at 140 Gbit/s already is poor and has significantly less voltage swing than the MUX presented in this paper. Additionally, the MUX presented here does not need a linear feedforward equalizer to equalize the output signal.…”

Section: Measurement Resultsmentioning

confidence: 72%

A 100 Gbit/s 2 Vpp power multiplexer in SiGe BiCMOS technology for directly driving a monolithically integrated plasmonic MZM in a silicon photonics transmitter

Uhl

Hettrich²,

Möller

2017

2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)

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An 8:1 multiplexer with a power output stage (PMUX) in SiGe BiCMOS technology for directly driving a plasmonic Mach-Zehnder modulator (MZM) with a 2 Vpp differential voltage swing at a data rate of 100 Gbit/s is presented. The PMUX is intended to be monolithically integrated with an ultrashort MZM on a single chip in a novel silicon photonic process. Through this integration, the bandwidth and output voltage swing could be improved compared to an external MZM load that requires far end termination. Furthermore, the direct driving by the PMUX eliminates the traditional driver amplifier, whereby power can be saved and the signal quality can be improved. Electrical measurements of the MUX show clear eye openings at 100 Gbit/s up to a 2.0 Vpp differential output voltage swing at an external 50 Ω oscilloscope load. The inherent high-speed capability of the PMUX is demonstrated at the speed limit of the available measurement equipment at 140 Gbit/s, where the PMUX still achieves 1.2 Vpp differential voltage swing, which is a record for SiGe bipolar technology.

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Section: Measurement Resultsmentioning

confidence: 72%

A 100 Gbit/s 2 Vpp power multiplexer in SiGe BiCMOS technology for directly driving a monolithically integrated plasmonic MZM in a silicon photonics transmitter

Uhl

Hettrich²,

Möller

2017

2017 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)

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“…previous WiNoC literature rarely details information about these blocks. Therefore, we propose to adopt a SER/DESER binary MUX tree topology with half-rate architecture [30], [31], which uses a 625 MHz half-rate clock source to generate 1.25 Gb/s data rate. In addition, this architecture is a good compromise between higher data rates and risks of duty-cycle distortion and clock skew.…”

Section: B Wireless Interface Architecturementioning

confidence: 99%

A Diversity Scheme to Enhance the Reliability of Wireless NoC in Multipath Channel Environment

Sosa¹,

Sentieys

Roland

2018

2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS)

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Wireless Network-on-Chip (WiNoC) is one of the most promising solutions to overcome multi-hop latency and high power consumption of modern many/multi core System-on-Chip (SoC). However, the design of efficient wireless links faces challenges to overcome multi-path propagation present in realistic WiNoC channels. In order to alleviate such channel effect, this paper presents a Time-Diversity Scheme (TDS) to enhance the reliability of on-chip wireless links using a semi-realistic channel model. First, we study the significant performance degradation of state-of-the-art wireless transceivers subject to different levels of multi-path propagation. Then we investigate the impact of using some channel correction techniques adopting standard performance metrics. Experimental results show that the proposed Time-Diversity Scheme significantly improves Bit Error Rate (BER) compared to other techniques. Moreover, our TDS allows for wireless communication links to be established in conditions where this would be impossible for standard transceiver architectures. Results on the proposed complete transceiver, designed using a 28-nm FDSOI technology, show a power consumption of 0.63mW at 1.0V and an area of 317 µm 2. Full channel correction is performed in one single clock cycle.

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“…In comparison, the fastest MUX known to the authors is realised in an InP technology with

f_{normalT} = 400 GHz

and achieves 212 Gbit/s data rate at a differential output voltage swing of

240 {normalmV}_{normalpp}

[3]. For Si‐based technology, the fastest MUX achieves 160 Gbit/s at

f_{normalT} = 300 GHz

and a differential output voltage swing of

90 {normalmV}_{normalpp}

[4]. Thus, the MUX presented here in a

f_{normalT} = 300 GHz

SiGe BiCMOS technology represents speed and an output voltage swing record for Si‐based technology.…”

Section: Introductionmentioning

confidence: 99%

180 Gbit/s 4:1 power multiplexer for NRZ‐OOK signals with high output voltage swing in SiGe BiCMOS technology

Uhl

Hettrich²,

Möller

2020

Electron. lett.

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A 4:1 multiplexer (MUX) circuit in SiGe BiCMOS technology intended to directly drive a plasmonic Mach-Zehnder modulator for transmitter applications is presented. To achieve the highest data rates at a high output voltage swing, a power MUX concept is applied that maps the high-speed performance of the final clock signal onto the output data. In the clock tree a novel wideband 90°clock phase shifter circuit is utilised for timing adjustment and frequency doubling. Electrical measurements of the chip demonstrate open eye diagrams for non-return-to-zero on-off-keying (NRZ-OOK) signals up to 180 Gbit/s, which is record speed for Si-based technologies. A differential output voltage swing of 300 mV pp was measured that corresponds to an output voltage swing of more than 1 V pp without the bandwidth limit of the measurement equipment.

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140 Gb/s Serializer Using Clock Doublers in 90 nm SiGe Technology

Cited by 5 publications

References 21 publications

A 100 Gbit/s 2 Vpp power multiplexer in SiGe BiCMOS technology for directly driving a monolithically integrated plasmonic MZM in a silicon photonics transmitter

A 100 Gbit/s 2 Vpp power multiplexer in SiGe BiCMOS technology for directly driving a monolithically integrated plasmonic MZM in a silicon photonics transmitter

A Diversity Scheme to Enhance the Reliability of Wireless NoC in Multipath Channel Environment

180 Gbit/s 4:1 power multiplexer for NRZ‐OOK signals with high output voltage swing in SiGe BiCMOS technology

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