3-D floorplanning algorithm to minimize thermal interactions

Abstract

An algorithm for including relative thermal interactions among different circuit modules within a 3-D system is introduced in this paper. Application of the proposed algorithm on MCNC and GSRC benchmark circuits is presented. The thermal behavior of a heterogeneous 3-D structure, consisting of a different number of modules and substrate materials, is evaluated to emulate the heat transfer characteristics of practical heterogeneous 3-D systems. The algorithm lowers thermal interactions between different modules while maintaining the peak temperature within a practical range. The thermal characteristics of the floorplan are evaluated using HotSpot and HotSpot Detailed 3-D and compared to a random floorplan. The recorded peak temperatures are within the practical range of on-chip temperatures.

Network on interconnect fabric

“…The Si-IF spreads the heat effectively across the entire wafer. Nonetheless, additional thermal aware floorplanning techniques can be required to separate thermally aggressive from thermally sensitive dies [15]. The NoIF can exhibit an irregular floorplan based on the specific requirements of the system within the Si-IF.…”