IEEE International Electron Devices Meeting 2003
DOI: 10.1109/iedm.2003.1269372
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3-D Monte Carlo simulations of FinFETs

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Cited by 12 publications
(9 citation statements)
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“…However, it has been reported in literature that, as long as tunneling is neglected, the main quantum mechanical effect on transport down to the sub-10 nm range is charge displacement from the interface [25]- [27]. This effect is correctly accounted for in our Monte Carlo simulator (named MC++) by adding an appropriate quantum mechanical correction to the potential profile [14]- [16]. We take this correction from the self-consistent solution of the Schrödinger equation (SE) with traditional coupled Poisson-Monte Carlo simulation.…”
Section: Simulation Methodology and Physical Modelsmentioning
confidence: 99%
See 1 more Smart Citation
“…However, it has been reported in literature that, as long as tunneling is neglected, the main quantum mechanical effect on transport down to the sub-10 nm range is charge displacement from the interface [25]- [27]. This effect is correctly accounted for in our Monte Carlo simulator (named MC++) by adding an appropriate quantum mechanical correction to the potential profile [14]- [16]. We take this correction from the self-consistent solution of the Schrödinger equation (SE) with traditional coupled Poisson-Monte Carlo simulation.…”
Section: Simulation Methodology and Physical Modelsmentioning
confidence: 99%
“…In this case, in order to account for QM effects, the semiclassical MC technique must be modified. Usually, a potential correction term is added to account for the effect of charge quantization [14]- [16], or multi subband approaches must be exploited [17], [18], but this has been done with the inclusion of strain only in 2-D [19], [20].…”
Section: Introductionmentioning
confidence: 99%
“…We employ a quantum corrected 3D particle Monte Carlo (MOCA 3D) described in [5]. Quantum effects due to the sudden change in potential at the Si-SiO 2 interface in essence leads to a repulsion of charge density from the interface.…”
Section: Simulationmentioning
confidence: 99%
“…Among the DC characteristics of DG MOSFETs, the threshold voltage (V th ) behavior is very important for accurate analysis, device design, and circuit design. To apply DG MOSFETs 7,8) in integrated circuits, V th behavior should be characterized, and parameters for V th should be extracted. Therefore, we proposed a V th0 (V th at a low drain bias) model of DG MOSFETs with a doped channel based on charge-sharing length (x h ) and surface potential lowering.…”
Section: Introductionmentioning
confidence: 99%