300 mm MOCVD 2D CMOS Materials for More (Than) Moore Scaling

Maxey, K.; Naylor, Carl H.; O’Brien, Kevin; Penumatcha, Ashish V.; Oni, A.; Mokhtarzadeh, Charles C.; Dorow, C. J.; Rogan, C.; Holybee, B.; Tronic, Tristan A.; Adams, Dominique; Arefin, N.; Gupta, Arnab; Lin, Charlie; Zhong, Tao; Lee, S.; Kitamura, A.; Bristol, Robert; Clendenning, Scott B.; Avci, Uygar E.; Metz, M.

doi:10.1109/vlsitechnologyandcir46769.2022.9830457

Cited by 17 publications

(14 citation statements)

References 4 publications

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“…Using this approach, they also demonstrated p-type WSe 2 FETs with vdW Au contacts exhibiting an R C value of 1.25 kΩ μm. Another report suggested the use of Ru contacts and reported high ON currents up to 50 μA/μm and low OFF currents . However, Ru itself is unstable and the results may be difficult to reproduce.…”

Section: Introductionmentioning

confidence: 99%

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Toward High-Performance p-Type Two-Dimensional Field Effect Transistors: Contact Engineering, Scaling, and Doping

Oberoi,

Han,

Stepanoff

et al. 2023

ACS Nano

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n-type field effect transistors (FETs) based on twodimensional (2D) transition-metal dichalcogenides (TMDs) such as MoS 2 and WS 2 have come close to meeting the requirements set forth in the International Roadmap for Devices and Systems (IRDS). However, p-type 2D FETs are dramatically lagging behind in meeting performance standards. Here, we adopt a three-pronged approach that includes contact engineering, channel length (L ch ) scaling, and monolayer doping to achieve high performance p-type FETs based on synthetic WSe 2 . Using electrical measurements backed by atomistic imaging and rigorous analysis, Pd was identified as the favorable contact metal for WSe 2 owing to better epitaxy, larger grain size, and higher compressive strain, leading to a lower Schottky barrier height. While the ON-state performance of Pd-contacted WSe 2 FETs was improved by ∼10× by aggressively scaling L ch from 1 μm down to ∼20 nm, ultrascaled FETs were found to be contact limited. To reduce the contact resistance, monolayer tungsten oxyselenide (WO x Se y ) obtained using self-limiting oxidation of bilayer WSe 2 was used as a p-type dopant. This led to ∼5× improvement in the ON-state performance and ∼9× reduction in the contact resistance. We were able to achieve a median ON-state current as high as ∼10 μA/μm for ultrascaled and doped p-type WSe 2 FETs with Pd contacts. We also show the applicability of our monolayer doping strategy to other 2D materials such as MoS 2 , MoTe 2 , and MoSe 2 .

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Section: Introductionmentioning

confidence: 99%

“…Another report suggested the use of Ru contacts and reported high ON currents up to 50 μA/μm and low OFF currents. 38 However, Ru itself is unstable and the results may be difficult to reproduce. Another report performed self-aligned doping using an O 2 -doping process technique and demonstrated highperformance p-type FETs.…”

Section: Introductionmentioning

confidence: 99%

Toward High-Performance p-Type Two-Dimensional Field Effect Transistors: Contact Engineering, Scaling, and Doping

Oberoi,

Han,

Stepanoff

et al. 2023

ACS Nano

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“…To summarize, when considering critical factors of temperature, pressure, processing time, crystal coverage, thickness, and distribution control, the most viable options that emerge are MOCVD and conventional CVD (with an emphasis on the roll-to-roll kind). There is a trade-off between MOCVD’s superior quality (versus other methods that rely on similar levels of vacuum); however, recent efforts to scale up MOCVD protocols to prepare TMDs at the wafer scale make it a more suitable candidate. , However, one last caveat with the MOCVD technique is the duration taken, although recent efforts have begun to significantly address this concern . Therefore, the atomic layer deposition (ALD) tool is another possible contender.…”

Section: Conventional Methods: Optimizing An Implicit Synthesis Trade...mentioning

confidence: 99%

A Researcher’s Perspective on Unconventional Lab-to-Fab for 2D Semiconductor Devices

et al. 2023

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Current silicon technology is on the verge of reaching its performance limits. This aspect, coupled with the global chip shortage, makes a solid case for steering our attention toward the accelerated commercialization of other electronic materials. Among the available suite of emerging electronic materials, two-dimensional materials, including transition metal dichalcogenides (TMDs), exhibit improved short-channel effects, high electron mobility, and integration into CMOS-compatible processing. While these materials may not be able to replace silicon at the current stages of development, they can supplement Si in the form of Sicompatible CMOS processing and be manufactured for tailored applications. However, the major hurdle in the path of commercialization of such materials is the difficulty in producing their wafer-scale forms, which are not necessarily single crystalline but on a large scale. Recent but exploratory interest in 2D materials from industries, such as TSMC, necessitates an in-depth analysis of their commercialization potential based on trends and progress in entrenched electronic materials (Si) and ones with a short-term commercialization potential (GaN, GaAs). We also explore the possibility of unconventional fabrication techniques, such as printing, for 2D materials becoming more mainstream and being adopted by industries in the future. In this Perspective, we discuss aspects to optimize cost, time, thermal budget, and a general pathway for 2D materials to achieve similar milestones, with an emphasis on TMDs. Beyond synthesis, we propose a lab-to-fab workflow based on recent advances that can operate on a low budget with a mainstream full-scale Si fabrication unit.

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“…For 2DMs, progress has been made in the NMOS‐integration process but the PMOS preparation is more challenging due to the lack of high‐quality wafer‐scale p‐type 2DMs, [ 157 ] the extra n‐doping generated dielectric encapsulation, [ 158 ] and the difficulty of wafer‐scale accurate and controllable doping techniques. [ 159 ] Nonetheless, the research on CMOS‐integrated processes based on 2DMs has been ongoing.…”

Section: Process Integration Of 2dms In Device Levelmentioning

confidence: 99%

Two‐Dimensional Semiconductors: From Device Processing to Circuit Integration

Sheng,

Dong,

Zhu

et al. 2023

Adv Funct Materials

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The atomically thin nature and exceptional electrical properties of 2D materials (2DMs) have garnered significant interest in circuit applications. Researchers have developed circuits based on wafer‐level 2DM fabrication and monolithic integration in the laboratory. Numerous studies have been conducted on discrete device processes; however, circuit manufacturing is a multifaceted and methodical engineering process that demands seamless integration of multiple procedures. Notably, the optimization of crucial processes holds paramount significance in achieving expected results. This review presents the existing research on process integration of 2DM devices and circuit applications. The selection of suitable 2DMs for circuit applications is outlined, considering their excellent theoretical properties and feasible high‐quality growth processes. Drawing on highly mature semiconductor manufacturing process, while incorporating customized key processes, 2DM devices have the potential to strongly compete with, and even outperform, the conventional devices. Finally, the recent circuit applications of 2DMs are also discussed in detail. 2DM integrated circuits (2DM ICs) are now being practically applied in advanced manufacturing, transitioning from laboratory development to fabrication plant deployment. The implementation of underlying 2DM IC fabrication provides effective and unique solutions for More Moore, More than Moore, and Beyond CMOS technology routes.

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300 mm MOCVD 2D CMOS Materials for More (Than) Moore Scaling

Cited by 17 publications

References 4 publications

Toward High-Performance p-Type Two-Dimensional Field Effect Transistors: Contact Engineering, Scaling, and Doping

Toward High-Performance p-Type Two-Dimensional Field Effect Transistors: Contact Engineering, Scaling, and Doping

A Researcher’s Perspective on Unconventional Lab-to-Fab for 2D Semiconductor Devices

Two‐Dimensional Semiconductors: From Device Processing to Circuit Integration

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