3D AND-Type Stacked Array for Neuromorphic Systems

Jang, Taejin; Kim, Suhyeon; Chang, Jeesoo; Min, Kyung Kyu; Hwang, Sungmin; Park, Kyungchul; Lee, Jong-Ho; Park, Byung‐Gook

doi:10.3390/mi11090829

Cited by 5 publications

(4 citation statements)

References 54 publications

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“…AND flash array is also one of the potential candidates as a synapse array for three-terminal devices, as shown in Figure 7G ( Jang et al, 2020 ; Lue et al, 2020 ; Seo et al, 2021 ). Its VMM operation is very similar to that of the NOR flash array.…”

Section: Synaptic Devicesmentioning

confidence: 99%

A comprehensive review of advanced trends: from artificial synapses to neuromorphic systems with consideration of non-ideal effects

Kim,

Song,

Hwang

et al. 2024

Front. Neurosci.

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A neuromorphic system is composed of hardware-based artificial neurons and synaptic devices, designed to improve the efficiency of neural computations inspired by energy-efficient and parallel operations of the biological nervous system. A synaptic device-based array can compute vector–matrix multiplication (VMM) with given input voltage signals, as a non-volatile memory device stores the weight information of the neural network in the form of conductance or capacitance. However, unlike software-based neural networks, the neuromorphic system unavoidably exhibits non-ideal characteristics that can have an adverse impact on overall system performance. In this study, the characteristics required for synaptic devices and their importance are discussed, depending on the targeted application. We categorize synaptic devices into two types: conductance-based and capacitance-based, and thoroughly explore the operations and characteristics of each device. The array structure according to the device structure and the VMM operation mechanism of each structure are analyzed, including recent advances in array-level implementation of synaptic devices. Furthermore, we reviewed studies to minimize the effect of hardware non-idealities, which degrades the performance of hardware neural networks. These studies introduce techniques in hardware and signal engineering, as well as software-hardware co-optimization, to address these non-idealities through compensation approaches.

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Section: Synaptic Devicesmentioning

confidence: 99%

A comprehensive review of advanced trends: from artificial synapses to neuromorphic systems with consideration of non-ideal effects

Kim,

Song,

Hwang

et al. 2024

Front. Neurosci.

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“…Numerous studies have proposed the utilization of diverse memory devices (such as memristors, NOR, NAND, and AND flash) for NN implementation. [143,145,[167][168][169][170] However, the high operation voltage and low endurance of flash memories are unfavorable for NNs, which require frequent memory-state updates. Although it has similar structure to that of flash, the ferroelectric transistors exhibit a low write latency and energy, exhibiting high potential for lowpower neuromorphic applications.…”

Section: Ferroelectric Transistor Arrays For Nnsmentioning

confidence: 99%

Ferroelectric Transistors for Memory and Neuromorphic Device Applications

Kim

Lee

2023

Advanced Materials

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Because a non-centrosymmetric crystal structure is mandatory for ferroelectric properties, very few materials are classified as ferroelectric. Historically, materials with complex crystal structures, such as BaTiO 3 (BTO), Pb[Zr x Ti 1−x ]O 3 (PZT), and Sr 2 Bi 2 TaO 9 (SBT), have been found to exhibit ferroelectricity. [5][6][7][8][9] Due to their spontaneous polarization, ferroelectric materials are diversely applied in memory devices, actuators, sensors, and energy storage. [1,2,[10][11][12][13] As the polarization state of ferroelectric materials can be regulated by an external electric field and the polarization is retained after the removal of the external electric field, such materials have the potential for applications involving high-performance non volatile memories. [9,14] However, some issues of conventional ferroelectric materials, such as high annealing temperatures, the requirement of noble electrode materials, and the diffusion of elements such as Pb complicate the integration of the previously reported ferroelectric materials into complementary metal-oxide semiconductors (CMOSs). [15][16][17][18] Furthermore, the large dielectric constants of perovskite-based ferroelectrics lead to high depolarization fields; [9,16] thus, the materials have short retention time and exhibit unstable polarization. [9] Additionally, the limited thickness scalability, complex etching process, and fatigue behaviors of perovskite-based ferroelectrics hinder the development of highly scaled ferroelectric devices. [9,18] Thus, semiconductor devices based on ferroelectric materials have limited commercial applications. Since the development of hafnia-based ferroelectrics, ferroelectric hafnia has attracted immense attention toward the development of semiconductor devices. [19][20][21] Compared to perovskite-based ferroelectric materials, hafnia-based ferroelectrics exhibit high scalability, and have high coercive electric fields (E c ) and low dielectric permittivity values, making them suitable for the fabrication of high-performance memory devices. [2,16,20,22] Additionally, hafnia is compatible with Si-based CMOS processes. Due to these advantages, hafnia-based ferroelectrics have been used in next-generation memory devices (such as ferroelectric capacitors, transistors, and tunnel junctions [FTJs]). [22][23][24][25][26] This paper reviews the recent findings and applications of hafnia-based ferroelectrics, highlighting the recent advances in ferroelectric transistors for next-generation memory and neuromorphic Ferroelectric materials have been intensively investigated for highperformance nonvolatile memory devices in the past decades, owing to their nonvolatile polarization characteristics. Ferroelectric memory devices are expected to exhibit lower power consumption and higher speed than conventional memory devices. However, non-complementary metal-oxidesemiconductor (CMOS) compatibility and degradation due to fatigue of traditional perovskite-based ferroelectric materials have hindered the development of high-density...

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“…The FET-type synaptic device could be an example of this comparison because its off-current characteristics depend on the density of the trapped charge in the storage layer. The FETtype synaptic devices reported in our previous studies modulated the synaptic weight by changing the density of the trapped charge [29], [32], [37]. Consequently, the off-current of the FET-type device was determined with respect to the synaptic weight.…”

Section: Device Structure and Measurementmentioning

confidence: 99%

“…Consequently, the leaky I & F neuron circuit has its limitations in multi-layer SNNs in terms of blocking the synaptic off-current, even if the off-current in each synaptic device is not weight-dependent. Second, synaptic devices and arrays have often been restricted so that no synaptic off-current flows in the idle state [32], [33]. This type of solution can eliminate synaptic off-currents flowing from the synaptic device to the I & F neuron circuits.…”

Section: Introductionmentioning

confidence: 99%

Integrate-and-Fire Neuron Circuit With Synaptic Off-Current Blocking Operation

et al. 2021

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In this study, we propose an analog CMOS integrate-and-fire (I & F) neuron circuit with a synaptic off-state current blocking operation. The proposed circuit prevents unintended potential changes in the membrane capacitor owing to the off-state current of synaptic devices, thereby preventing a decrease in the accuracy of the spiking neural network (SNN) inference system. Compared to the conventional I & F neuron circuit, the basic I & F and synaptic off-current blocking operations of the proposed I & F neuron circuit were confirmed in a circuit-level simulation. Furthermore, to verify the effect of the proposed circuit on the neural network, a multi-layer SNN simulation was performed, and the accuracy of the inference system was compared for the conventional and proposed I & F neuron circuits. The simulation and analysis results demonstrate the robustness of the I & F neuron circuit to the drop in accuracy of inference systems due to off-state currents in synaptic devices. INDEX TERMS neuromorphic system, CMOS-based integrate-and-fire (I & F) neuron circuit, spiking neural networks (SNNs), synaptic off-state current blocking operation, TCAD simulation, SPICE simulation, SNN high-level simulation.

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3D AND-Type Stacked Array for Neuromorphic Systems

Cited by 5 publications

References 54 publications

A comprehensive review of advanced trends: from artificial synapses to neuromorphic systems with consideration of non-ideal effects

A comprehensive review of advanced trends: from artificial synapses to neuromorphic systems with consideration of non-ideal effects

Ferroelectric Transistors for Memory and Neuromorphic Device Applications

Integrate-and-Fire Neuron Circuit With Synaptic Off-Current Blocking Operation

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