3D Die-to-wafer Cu/Sn Microconnects Formed Simultaneously with an Adhesive Dielectric Bond Using Thermal Compression Bonding

Surface Passivation of Cu for Low Temperature 3D Wafer Bonding

“…Cu control sample, on the hand, shows an increase in the C/Cu ratio after 5 days of exposure to the ambient from 1.0 to 1.7. This is mainly due to the surface oxidation of Cu surface which in turn reacts with the moisture and CO 2 in ambient to form Cu(OH) 2 and CuCO 3 (as detected in XPS analysis, not shown). Therefore, with prolonged exposure in the ambient, Cu surface oxidation and subsequent formation of CuCO 3 result in an increase in the C/Cu ratio on Cu control sample.…”

“…Copper is an attractive choice to perform metal diffusion bonding mainly because: (1) Cu readily bonds itself under thermal treatment compatible with the back-end-of-line (BEOL) process; (2) Cu has high electrical and thermal conductivities; (3) CuCu bond is scalable and thus it provides high density interconnection. Points (2) and (3) are related to the absence of intermetallic compound found in conventional Cu/Sn bonding. 2 Despite a long list of benefits, lowering the bonding temperature during Cu-Cu diffusion bonding remains an important requirement to preserve the integrity of fully or partially completed on-chip circuitry, to reduce thermal-mechanical stress in the bonded 3D stack, and to improve the alignment accuracy.…”

“…Points (2) and (3) are related to the absence of intermetallic compound found in conventional Cu/Sn bonding. 2 Despite a long list of benefits, lowering the bonding temperature during Cu-Cu diffusion bonding remains an important requirement to preserve the integrity of fully or partially completed on-chip circuitry, to reduce thermal-mechanical stress in the bonded 3D stack, and to improve the alignment accuracy. As Cu oxidizes readily in ambient air which results in poor bonding quality at low temperature, much investigation has been concentrated on methods to circumvent this problem.…”

Integration and Frequency Dependent Parametric Modeling of Through Silicon via Involved in High Density 3D Chip Stacking

“…First we have to distinguish between collective bonding and single die processing techniques. Indeed, single chip can be stacked over another one in a die to die approach (D2D [6]) or over a wafer according to a die to wafer method (D2W [7,8]). Wafer to wafer bonding (W2W [9]) can be performed too, leading to a collective stacking of the whole embedded dies.…”

Novel Silver Solid-State Bonding Designs Between Two Copper Structures

“…Thus, the bonding processes were performed at 300°C with the pressure of 6.89 MPa (1000 psi) to bring the Ag and Cu surface profiles within atomic distance. It is worth mentioning that this pressure is less than 10% of what is used in industrial thermocompression processes [13]- [15]. Some preliminary results were presented recently [16].…”