3D NAND Memory Operation of Oxide-Semiconductor Channel FeFETs and the Potential Impact of In-Plane Polarization

Hao, Junxiang; Mei, Xiaoran; Saraya, Takuya; Hiramoto, Toshiro; Kobayashi, Masaharu

doi:10.1109/edtm55494.2023.10103035

Cited by 3 publications

(1 citation statement)

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“…We also study the impact of inplane polarization under the spacer of 3D NAND FeFETs. This paper is an extended version of the previous conference proceedings, 24) with new exploration of the self-boost program inhibit operation and the prediction of stacking possibility.…”

Section: Introductionmentioning

confidence: 99%

Oxide-semiconductor channel ferroelectric field-effect transistors for high-density memory applications: 3D NAND operation and the potential impact of in-plane polarization

Hao,

Mei,

Saraya

et al. 2024

Jpn. J. Appl. Phys.

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We have explored 3D NAND memory operation of oxide-semiconductor (OS) channel FeFETs by TCAD simulation with a multi-transistor NAND-string model. Key challenges in 3D NAND memory devices, such as (1) disturb from pass voltages (Vpass), (2) interference from neighboring wordlines (WLs), and (3) both conventional and self-boost program inhibit operation of unselected bitlines (BLs), are addressed. For a target device structure, operation voltages can be optimized to satisfy the requirement of (1)-(3). The stacking possibility of 3D NAND OS FeFETs is also predicted by conducting an extrapolation from TCAD simulation results. We have also studied the potential impact of in-plane polarization in the NAND FeFET string. A comparative study shows that in-plane polarization under the spacer may lead to unexpected characteristics of OS-channel FeFETs in 3D NAND memory operation. This paper will provide insights on the feasibility of 3D NAND FeFETs for high-capacity storage memory.

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Section: Introductionmentioning

confidence: 99%