4.5kV SiC Charge-Balanced MOSFETs with Ultra-Low On-Resistance

Ghandi, Reza; Bolotnikov, Alexander; Kennerly, Stacey; Hitchcock, Collin; Tang, Poonman; Chow, T. Paul

doi:10.1109/ispsd46842.2020.9170171

Cited by 25 publications

(6 citation statements)

References 8 publications

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“…Such a system has been developed at the Tandem Van de Graaff accelerator facility at Brookhaven National Laboratory with the capability of multi-steps high energy implantation at energies up to 150 MeV [3]. By employing such a system, medium voltage charge balance devices and 2 kV superjunction structure PIN diode have been demonstrated [6,7]. Implantation employing high energy ions can create lattice strain in the epilayer by displacing the host atoms.…”

Section: Introductionmentioning

confidence: 99%

Analysis of Strain in Ion Implanted 4H-SiC by Fringes Observed in Synchrotron X-Ray Topography

Chen

Liu

Peng

et al. 2023

DDF

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A novel high energy implantation system has been successfully developed to fabricate 4H-SiC superjunction devices for medium and high voltages via implantation of dopant atoms with multi-energy ranging from 13 to 66 MeV to depths up to 12um. Since the level of energies used is significantly higher than those employed for conventional implantation, lattice damage caused by such implantation must be characterized in detail to enhance the understanding of the nature of the damage. In regard to this, by employing the novel high energy system, 4H-SiC wafers with 12μm thick epilayers were blanket implanted by Al atoms at energies ranging from 13.8MeV to 65.7MeV and N atoms at energies ranging up to 42.99MeV. The lattice damages induced by the implantation were primarily characterized by Synchrotron X-ray Plane Wave Topography (SXPWT). 0008 topographs recorded from the samples are characterized by an intensity profile consisting of multiple asymmetric diffraction peaks with an angular separation of only 2” (arcseconds). Using Rocking-curve Analysis by Dynamical Simulation (RADS) program, diffracted intensity profile was used to extract the corresponding strain profile indicating an inhomogeneous strain distribution across the depth of the implanted layer.

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Section: Introductionmentioning

confidence: 99%

Analysis of Strain in Ion Implanted 4H-SiC by Fringes Observed in Synchrotron X-Ray Topography

Chen

Liu

Peng

et al. 2023

DDF

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“…A novel multi-step high energy implantation system, allowing adjustable energy to 66 MeV, has been developed at Brookhaven National Laboratory's Tandem Van de Graaff accelerator facility [6]. Ghandi and coworkers have successfully fabricated medium voltage device with deep junction via this implantation system [7]. Ion implantation usually induces lattice strains in the SiC wafers by displacing the Si and C atoms.…”

Section: Introductionmentioning

confidence: 99%

Investigation of Lattice Strain in High Energy Implanted 4H-SiC Wafers by Al or N Atoms

Chen

Peng

Liu

et al. 2022

MSF

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4H-SiC wafers with 12 um epilayer were implanted at the Tandem Van de Graaff facility at Brookhaven National Laboratory with tunable energy from 13 MeV up to 66 MeV. Lattice strains introduced by the implantation process were characterized in detail by synchrotron rocking curve X-ray topography (SXRCT) and reciprocal space maps (RSMs). It is observed that the strain levels correlate with the atomic mass and energy of acceleration of the dopant atoms.

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“…Alternately, the trench refill approach has generated crystallographic defects that result in excessive leakage at high blocking voltages, and achieving uniform, target dopant distribution inside re-grown layers has required complex growth conditions that make the regrowth process challenging. Recently, SiC charge-balanced (CB) diodes and MOSFETs were reported as an alternative solution to SJ devices with a simpler and scalable fabrication process [5][6]. In these devices, a novel drift layer architecture is implemented with buried p-doped regions inside the drift layers instead of p-doped pillars.…”

Section: Introductionmentioning

confidence: 99%

(Invited) Medium-Voltage SiC Devices for Next Generation of Power Conversion

Ghandi¹,

Hitchcock²,

Kennerly³

2021

ECS Trans.

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We report successful demonstration of 3.3kV SiC charge-balanced (CB) JBS diodes and 4.5kV CB MOSFETs with Ron,sp significantly below 1-D SiC unipolar limit. These devices implement a novel scalable drift layer architecture for a high voltage switch as an alternative solution to super-junction devices. Furthermore, 2kV, SiC super-junction (SJ) PiN diodes are reported. These diodes are formed by deep implantation of Al and N and show a blocking voltage 500V higher than comparable non-SJ diodes.

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4.5kV SiC Charge-Balanced MOSFETs with Ultra-Low On-Resistance

Cited by 25 publications

References 8 publications

Analysis of Strain in Ion Implanted 4H-SiC by Fringes Observed in Synchrotron X-Ray Topography

Analysis of Strain in Ion Implanted 4H-SiC by Fringes Observed in Synchrotron X-Ray Topography

Investigation of Lattice Strain in High Energy Implanted 4H-SiC Wafers by Al or N Atoms

(Invited) Medium-Voltage SiC Devices for Next Generation of Power Conversion

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