2017 IEEE International Solid-State Circuits Conference (ISSCC) 2017
DOI: 10.1109/isscc.2017.7870280
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5.8 A 9.3nW all-in-one bandgap voltage and current reference circuit

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Cited by 77 publications
(36 citation statements)
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“…A reference voltage circuit achieves a low TC by combining two voltages being, respectively, proportional (PTAT) and complementary (CTAT) to the absolute temperature (T). In bipolar junction transistor (BJT) bandgap references, both the PTAT and CTAT voltages are generated by means of p‐n junctions, 10,11 whereas in hybrid bandgaps the PTAT voltage is generated by MOS devices, possibly combined with resistors 12‐14 . Instead, in a MOS reference, both CTAT and PTAT voltages are generated by MOS transistors 15,16 …”
Section: Introductionmentioning
confidence: 99%
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“…A reference voltage circuit achieves a low TC by combining two voltages being, respectively, proportional (PTAT) and complementary (CTAT) to the absolute temperature (T). In bipolar junction transistor (BJT) bandgap references, both the PTAT and CTAT voltages are generated by means of p‐n junctions, 10,11 whereas in hybrid bandgaps the PTAT voltage is generated by MOS devices, possibly combined with resistors 12‐14 . Instead, in a MOS reference, both CTAT and PTAT voltages are generated by MOS transistors 15,16 …”
Section: Introductionmentioning
confidence: 99%
“…Remarkable research activity has been also carried out to push the power consumption of voltage references in the hundreds of pW range, 12,15,17 by exploiting the leakage current of a MOS device to bias the circuit 14‐16,18,19 . However, these architectures exhibit small operative TRs due to the high variability of the bias current, which becomes too small to mantain target performance at low temperatures.…”
Section: Introductionmentioning
confidence: 99%
“…[8][9][10][11] are all able to achieve a TC < 100 ppm/ • C but consume from 35 µW to 0.648 mW, which is far too much power for our RAMP system. Other above-1 V voltage reference circuits have been able to simultaneously maintain a low TC and power consumption less than 10 µW by using devices that are not available in standard CMOS processes, such as anti-doped NMOS devices [12], native NMOS devices [13], and NPN transistors [14][15][16].…”
Section: Introductionmentioning
confidence: 99%
“…These voltage references should be insensitive to variations in process, temperature and supply voltage [1][2][3][4][5][6]. The performance of many mixed analog/digital systems is limited by inaccuracies and power supply noise coupling errors in integrated voltage references.…”
Section: Introductionmentioning
confidence: 99%