77 K single electron transistors fabricated with 0.1 μm technology

Abstract

Metal based single electron transistors are fabricated by the step edge cut off process. Titanium metal lines with a width of 0.1 μm are deposited on prepatterned silicon substrates, that serve as the dielectric barriers for the tunnel junctions. In structures with multiple tunnel junctions, clear Coulomb blockade and Coulomb oscillation features can be observed at temperatures up to 77 K.

Coulomb blockade effects in anodically oxidized titanium wires

“…6 Various methods have been used to fabricate titanium single electron devices. [7][8][9][10] The technique of anodic oxidation of Ti surfaces using a scanning tunneling microscope ͑STM͒ tip provides an experimental route to create oxide barriers with nanometric dimensions. With STM nanooxidation a single electron transistor operational at room temperatures was achieved.…”

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“…Die Eigenschaften des sich an der Kante bildenden Tunnelkontaktes ergeben sich aus der Tiefe der Gräben und der Dicke der deponierten Metallisierung. Auch in solchen Strukturen gelang es, Coulomb-Blockade-Effekte bis zu T = 77 K nachzuweisen [5].…”

Single Electron Devices

“…159 An STM is used to oxidize a thin Ti film to create a single electron device with four clear Coulomb staircases of ~ 150 mV (but with an overall device conductance of pS, while the Takahashi et al device 103 had a device conductance of /xS) each at room temperature by Matsumoto et al 160 A single electron transistor using Nb-NbO x tunnel junctions was fabricated using an atomic force microscopy based on the anodic oxidation technique by Shirakashi et al 161 Resonant tunneling properties of single electron transistors with a double-gate geometry were fabricated and studied by Fujisawa and Tarucha. 162 Polysiliconbased single electron transistors fabricated using thin cobalt silicide layers on amorphous Si is described by Kamal et al 163 A Ti-based step-edge cut-off (SECO) fabrication scheme using a 0.1-/um-based lithographic technology was used to fabricate devices with a charging energy of 125 meV by Altmeyer et al 164 An Al-based single electron transistor using a three-angle shadow evaporation resulting in an 11.5-meV charging energy was fabricated by Nakamura, Chen, and Tsai. 165 The advantages of single electron devices with asymmetric tunnel barriers for large scale integration was studied by computer simulation by Matsumoto et al 166 ' 167 An extremely narrow channel metal oxide semiconductor field-effect transistor (MOSFET) fabricated by an anisotropic etching technique shows evidence for the channel separating into quantum dots that conduct by resonant tunneling and thermally activated hopping at low temperatures while still displaying Coulomb blockade at room temperature was fabricated by Hiramoto et a/.…”