A 0.13μm CMOS low-voltage high-linearity mixer for UWB receiver

Shen, Hua; Yang, Libo; Lv, Xin

doi:10.1109/icmmt.2007.381464

Cited by 5 publications

(6 citation statements)

References 7 publications

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“…Since the transconductance stage and switching stage are AC-coupled, the DC bias can be set respectively [5]. The DC voltage at node M and N should be set as high as possible to make sure that the switching transistors can handle large voltage swing.…”

Section: B Switching Stage and Load Stagementioning

confidence: 99%

“…The DC voltage at node M and N should be set as high as possible to make sure that the switching transistors can handle large voltage swing. Meanwhile, to get high conversion gain, the DC voltage at node M and N should be low enough [5].…”

Section: B Switching Stage and Load Stagementioning

confidence: 99%

“…The 1/f noise is very important because the output frequency is low in down-conversion mixer [5]. In the switching stage, PMOSFET instead of NMOSFET are adopted in the design, for the smaller flicker noise of PMOSFET.…”

Section: B Switching Stage and Load Stagementioning

confidence: 99%

“…In the switching stage, PMOSFET instead of NMOSFET are adopted in the design, for the smaller flicker noise of PMOSFET. Poly-silicon resistors are used as load, because they are free of flicker noise [5].…”

Section: B Switching Stage and Load Stagementioning

confidence: 99%

“…Therefore RFCMOS integrated circuits become the hot spots at present because of the characteristics of low-cost, lowpower and easily-integrated. More and more topologies and design techniques of RF circuits based on scaling CMOS process have been introduced, and a great achievement has been acquired [1][2][3][4][5][6].…”

Section: Introductionmentioning

confidence: 99%

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A 5.15-5.825GHz CMOS Down-Conversion Mixer for WLAN 802.11a

Lai

Shi

et al. 2011

2011 7th International Conference on Wireless Communications, Networking and Mobile Computing

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This paper describes a 5.15GHz -5.825GHz CMOS down-conversion mixer for WLAN 802.11a receiver. Currentreuse technique is adopted at the transconductance stage, and the folded topology with current bleeding is implemented at the switching stage. Since the transconductance stage and the switching stage are AC-coupled through capacitors, the DC bias is independently configured by this kind of topology. This mixer is implemented in IBM 0.13μm CMOS process, and the active chip area is 967μm×828μm. Operating from a 1.3V power supply, power consumption for this down-conversion mixer is 12mW. When 5.2GHz testing RF input is supplied, the measurement results show that the circuit achieves 10.5dB conversion gain, 14dBm input-referred third-order intercept point. The single-sideband noise figure is about 16.02dB.

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Section: B Switching Stage and Load Stagementioning

confidence: 99%

Section: B Switching Stage and Load Stagementioning

confidence: 99%

Section: B Switching Stage and Load Stagementioning

confidence: 99%

Section: B Switching Stage and Load Stagementioning

confidence: 99%