A 0.9-V 28-MHz Highly Digital CMOS Dual-RC Frequency Reference With ±200 ppm Inaccuracy From −40 °C to 85 °C

Abstract

This article presents an energy-efficient dual-RC frequency reference intended for wireless sensor nodes. It consists of a digital frequency-locked loop (FLL) in which the frequency of a digitally controlled oscillator (DCO) is locked to a temperature-independent phase shift derived from two different RC poly-phase filters (PPFs). Phase shifts with complementary temperature coefficients (TCs) are generated by using PPFs made from different resistor types (p-poly and silicided p-poly). The phase shift of each filter is determined by a zero-crossing (ZC) detector and then digitized by a digital phase-domain modulator (-M). The results are then combined in the digital domain via fixed polynomials to produce a temperature-independent phase shift. This highly digital architecture enables the use of a sub-1-V supply voltage and enhances energy and area efficiency. The 28-MHz frequency reference occupies 0.06 mm 2 in a 65-nm CMOS process. It achieves a period jitter of 7 ps (1σ ) and draws 142 μW from a 0.9-V supply, which corresponds to an energy consumption of 5 pJ/cycle. Furthermore, it achieves ±200 ppm inaccuracy from −40 • C to 85 • C after a two-point trim.

A Single-Trim Frequency Reference System With 0.7 ppm/°C From −63 °C to 165 °C Consuming 210 μW at 70 MHz

“…Moreover, we report the largest temperature range and demonstrate a high stability over lifetime which makes the system suitable for the most stringent automotive temperature requirements. The 210 µW power consumption is on par with the RCbased work in [11]- [13] despite our higher output frequency. Simultaneously, this work achieves better frequency accuracy and integrates LDOs and a temperature sensor.…”

“…RC-based references typically have the lowest power consumption (due to, in general, a relatively low frequency) but have a residual TC f in the order of 1 to 10 ppm/°C after a 2T-trim due to complex thermal behaviour of the RC time constant. The oscillation frequency of RC-based references is regardless of the architecture, e.g., open-loop relaxation oscillator [9], [10] or with a frequency-lockedloop (FLL) [11]- [17], inversely proportional to the resistance and capacitance of integrated doped (poly) silicon resistors and capacitors. The resistors are typically the bottleneck for accuracy as these heavily suffer from PVTL variation [16], [29], [30].…”

“…There is, however, no fundamental reason why this could not be improved further using e.g. the approach in [11]- [13]. The rms period jitter of the free-running CCO in an uncontrolled environment is measured to be 14.5 ps, as shown in Figure 17.…”

A 20-μs Turn-On Time, 24-kHz Resolution, 1.5–100-MHz Digitally Programmable Temperature-Compensated Clock Generator

“…On-chip RC-based oscillators have recently garnered significant interest as attractive alternatives to traditional XO-based timing circuits [1], [2], [3], [4], [5], [6], [7], [8], [9], [10], [11], [12], [13], [14], [15], [16], [17], [18]. Among them relaxation oscillators are the simplest, occupy a small area, and can be turned ON/OFF instantaneously [1], [2], [3], [4], [5], [6], [7], but their frequency accuracy degrades significantly with temperature variations.…”

“…Closed-loop frequency-locked loop (FLL)-based oscillators achieve excellent accuracy at high output frequencies by eliminating the need for a high-speed comparator [19]. The schematic of a conventional FLL-based oscillator is shown in dominates, many compensation schemes for implementing a temperature-insensitive resistor have been proposed, and excellent frequency accuracies are achieved using them [8], [9], [10], [11], [12], [13], [14], [15], [16], [17], [18]. However, the FLL-based architecture suffers from two drawbacks not previously addressed.…”