A 1.45Gb/s (576,288) LDPC Decoder for 802.16e standard

Hung, Jui-Hui; Chen, Sau-Gee

doi:10.1109/isspit.2007.4458033

Cited by 2 publications

(2 citation statements)

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“…For L = 8, the energy consumption of PSCL is lower than that of SSCL and higher than that of Fast-SSCL. This is due to the nonlinear increment in power consumption that both SSCL and Fast-SSCL experience with increasing L. Table II compares power, energy, and area of the considered polar code decoders against architectures for LDPC 802.16e codes taken from [21], [22], and [23]. Polar code decoders are selected based on the observations from Fig.…”

Section: Asic Implementation Resultsmentioning

confidence: 99%

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On error-correction performance and implementation of polar code list decoders for 5G

Ercan

Condo

Hashemi

et al. 2017

2017 55th Annual Allerton Conference on Communication, Control, and Computing (Allerton)

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Polar codes are a class of capacity achieving error correcting codes that has been recently selected for the next generation of wireless communication standards (5G). Polar code decoding algorithms have evolved in various directions, striking different balances between error-correction performance, speed and complexity. Successive-cancellation list (SCL) and its incarnations constitute a powerful, well-studied set of algorithms, in constant improvement. At the same time, different implementation approaches provide a wide range of area occupations and latency results. 5G puts a focus on improved error-correction performance, high throughput and low power consumption: a comprehensive study considering all these metrics is currently lacking in literature. In this work, we evaluate SCL-based decoding algorithms in terms of error-correction performance and compare them to low-density parity-check (LDPC) codes. Moreover, we consider various decoder implementations, for both polar and LDPC codes, and compare their area occupation and power and energy consumption when targeting short code lengths and rates. Our work shows that among SCL-based decoders, the partitioned SCL (PSCL) provides the lowest area occupation and power consumption, whereas fast simplified SCL (Fast-SSCL) yields the lowest energy consumption. Compared to LDPC decoder architectures, different SCL implementations occupy up to 17.1× less area, dissipate up to 7.35× less power, and up to 26× less energy.

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Section: Asic Implementation Resultsmentioning

confidence: 99%

“…Table II compares power, energy, and area of the considered polar code decoders against architectures for LDPC 802.16e codes taken from [21], [22], and [23]. Polar code decoders are selected based on the observations from Fig.…”

Section: Asic Implementation Resultsmentioning

confidence: 99%