2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium 2007
DOI: 10.1109/rfic.2007.380918
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A 1.8-GHz 2-Watt Fully Integrated CMOS Push-Pull Parallel-Combined Power Amplifier Design

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Cited by 15 publications
(4 citation statements)
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“…From Table , the proposed push‐pull PA operated at a higher frequency by using a smaller‐sized multilayer center‐tapped transformer than the PA in Ref. .…”
Section: Simulation and Measurement Resultsmentioning
confidence: 99%
“…From Table , the proposed push‐pull PA operated at a higher frequency by using a smaller‐sized multilayer center‐tapped transformer than the PA in Ref. .…”
Section: Simulation and Measurement Resultsmentioning
confidence: 99%
“…However, the number of turns with this approach becomes larger on the secondary side, increasing the area and lowering the self-resonance frequency. Other examples can be found in [122], [123].…”
Section: Power Combination Using On-chip Transformersmentioning
confidence: 99%
“…Lower power gain, worse linearity, and poorer PAE by nature are the main performance issues associated with silicon-based technologies, especially silicon-CMOS. In addition, the low breakdown voltage is their main drawback for PA applications, and some unique PA architectures need to be applied to resolve this issue [6], [7]. This may lead to circuit design complexity and higher cost.…”
Section: Semiconductor Technologies For Rf Integrated Circuit Handsetmentioning
confidence: 99%