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A novel load insensitive power amplifier (LIPA) (BiFET) process that provides all positive DC supply and with balanced structure is developed for 3G (HSDPA and maintains good RF performance. The module generates HSUPA) handset application at PCS band from 1850-regulated voltage internally from the battery supply. 1910MHz. No external regulated voltage and analog voltage Therefore, no external reference voltage pin is needed.supplies are required at high power level and it is compatible Other features included are: with DC-to-DC converters. Digital or analog control may be applied to further improve its PAE at low and middle power * An enable switch (Ven) that turns the PA on/off, levels. This newly featured PA is integrated into a 4x7mm2 * A high power/low power efficiency enhancement front-end module (FEM) with good performance, especially mode switch (Vmode) that optimally adjusts the output under load mismatch condition.load and the device cell sizes between low and high output powers, I. INTRODUCTION * No additional analog or digital control required for A power amplifier or its front-end module is one of the high power mode. key components in 3G WCDMA mobile communication * An optional analog or digital control (Vctrl) that handsets. It consumes the majority of the handset battery further enhances low power mode efficiency.power. Power amplifiers are required to operate at high .Compatibility with DC-to-DC converter at high power efficiency over a wide range of output power levels due to mode.its dynamic output power change depending on their A front-end module (FEM) is also developed by distance from a base station. The operating power level at higes prbblt is, arun 10d loe tha th integrating the power amplifier together with an intermimumstprouabilitput s powr.oInd dBl r thean, th h stage filter, a highly directional coupler, a power detector, maximum ottorIand an output duplexer into a single 17-pin surface linearity requirement of a WCDMA system (with HSDPA mount 4x7xl.2mm3 highly compact package, utilizing and/or HSUPA modulation) increases the back-off of multiple-chip module (MCM) technology. The FEM output power from its peak level, thus resulting in a drop meets very stringent spectral requirement of HSDPA in efficiency. Moreover, the smaller module size, lower standards up to 25.2dBm output power as well as HSUPA supply voltage and less quiescent current are among the standards with the power backed off as specified in 3GPP main challenges. The integration of a power amplifier with FDD standard. filtering elements and other required components in a single package helps to enhance the module's performance II. POWER AMPLIFIER DESIGN and reduce its size and overall cost [1]. The big challenge Fig. 1 shows a schematic of the proposed switched to the single package integration is the interaction between balanced power amplifier, based on our patented LIPA power amplifier and its surrounding components, technology [3]. It consists of two stage power amplifiers at especially the leakage from Tx to Rx port...

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