A high performance Balanced Power Amplifier and Its Integration into a Front-end Module at PCS Band

Abstract

A novel load insensitive power amplifier (LIPA) (BiFET) process that provides all positive DC supply and with balanced structure is developed for 3G (HSDPA and maintains good RF performance. The module generates HSUPA) handset application at PCS band from 1850-regulated voltage internally from the battery supply. 1910MHz. No external regulated voltage and analog voltage Therefore, no external reference voltage pin is needed.supplies are required at high power level and it is compatible Other features included are: with DC-to-DC converters. Digital or analog control may be applied to further improve its PAE at low and middle power * An enable switch (Ven) that turns the PA on/off, levels. This newly featured PA is integrated into a 4x7mm2 * A high power/low power efficiency enhancement front-end module (FEM) with good performance, especially mode switch (Vmode) that optimally adjusts the output under load mismatch condition.load and the device cell sizes between low and high output powers, I. INTRODUCTION * No additional analog or digital control required for A power amplifier or its front-end module is one of the high power mode. key components in 3G WCDMA mobile communication * An optional analog or digital control (Vctrl) that handsets. It consumes the majority of the handset battery further enhances low power mode efficiency.power. Power amplifiers are required to operate at high .Compatibility with DC-to-DC converter at high power efficiency over a wide range of output power levels due to mode.its dynamic output power change depending on their A front-end module (FEM) is also developed by distance from a base station. The operating power level at higes prbblt is, arun 10d loe tha th integrating the power amplifier together with an intermimumstprouabilitput s powr.oInd dBl r thean, th h stage filter, a highly directional coupler, a power detector, maximum ottorIand an output duplexer into a single 17-pin surface linearity requirement of a WCDMA system (with HSDPA mount 4x7xl.2mm3 highly compact package, utilizing and/or HSUPA modulation) increases the back-off of multiple-chip module (MCM) technology. The FEM output power from its peak level, thus resulting in a drop meets very stringent spectral requirement of HSDPA in efficiency. Moreover, the smaller module size, lower standards up to 25.2dBm output power as well as HSUPA supply voltage and less quiescent current are among the standards with the power backed off as specified in 3GPP main challenges. The integration of a power amplifier with FDD standard. filtering elements and other required components in a single package helps to enhance the module's performance II. POWER AMPLIFIER DESIGN and reduce its size and overall cost [1]. The big challenge Fig. 1 shows a schematic of the proposed switched to the single package integration is the interaction between balanced power amplifier, based on our patented LIPA power amplifier and its surrounding components, technology [3]. It consists of two stage power amplifiers at especially the leakage from Tx to Rx port...

A Triple-Mode Balanced Linear CMOS Power Amplifier Using a Switched-Quadrature Coupler

“…2. The balanced PA has several advantages: load-variation insensitivity, a flat gain characteristic, enhanced stability, output power combining, a wide bandwidth, and improved input and output matching [12]- [14]. Among the advantages of the balanced PA, load variation immunity is essential for recent mobile wireless communication applications.…”

“…13(a). The inductor and the capacitor have the same impedance with opposite phase shifts of 45 and 45 , respectively, leading to a 90 phase difference between the upper and the lower paths [14]. The impedances at the input of each PA are derived as (8) (9) and represent quadrature phase difference.…”

Evolution of RFIC Handset PAs

“…The following PA architectures represent output PA device periphery change through complete turningoff (bypassing) of the output stage, as shown in Figure 12 [24], or partially turning-off the output cells, as shown in Figure 13 [25]. The output array size optimization for different power levels can also be realized by selecting the output array size independently to avoid any loading effect from each other [26].…”

Load Insensitivity Analysis of Balanced Power Amplifier for W-CDMA Handset Applications

“…이 PA 는 출력 부하 임피던스 부정합이 발생하더라도 내부 에 있는 두 평형(parallel) 증폭기가 부정합을 상호 보 완해 주는 부하 임피던스를 갖도록 동작하기 때문에 LIPA 특성이 뛰어나다 [6], [12] . 또한, 그동안 단점으로 지적되었던 회로의 크기 및 낮은 출력 전력 영역에 서의 효율 문제를 해결하기 위한 연구도 활발히 진 행되어 단말기용 PA로서의 사용이 적합할 수 있음 이 보고되었다 [8]～ [11] . 그러나 회로 구현에 관한 연구 는 보고되어 왔으나, 동작 원리에 대한 분석은 좀 더 다루어질 필요가 있었다.…”