A 14b continuous-time delta-sigma modulator with 2MHz signal bandwidth

Abstract

This paper describes the implementation of a low-voltage, wide bandwidth, continuous-time low-pass ∆Σ modulator. The presented modulator operates at a supply voltage of 1.8V and can achieve a maximum SNDR of 74dB (more than 12 bits) for an oversampling ratio of 32 and in a band-width of 2.5 MHz

Digital calibration technique based AC injection for continuous‐time sigma‐delta converters

“…In other words, when V in ( t ) = 0, V out ( n ) = 0. Since the SDADC is based on a negative feedback structure [5], referring to Figure 1, V y ( n ) = 0 and V x ( t ) = 0. Thus, when the loop filter input signal has zero mean, the output signal should also have zero mean.…”

“…Various non-ideal characteristics affect the RC time constant and deteriorate the performance of the device. In previous studies [3][4][5][6][7][8][9], calibration was only completed for capacitors when the RC time constant remained uncontrollable. The method presented herein is highly robust and practically meaningful, as it directly calibrates the RC time constant, thereby ensuring the integration accuracy corresponding to various non-ideal characteristics and processes, ensuring improved performance of a CTSDADC.…”