A 16-bit CORDIC rotator for high-speed wireless LAN

Maharatna, Koushik; Troya, A.; Banerjee, Swapna; Grass, Eckhard; Krstić, Miloš

doi:10.1109/pimrc.2004.1368299

Cited by 4 publications

(4 citation statements)

References 9 publications

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“…Despite a slightly higher hardware complexity, the proposed circuit benefits from the advantage of potentially lower power consumption compared to the classical CORDIC. This is since on average, the computational burden is reduced by 50%: However, our more recent work reveals that it is possible to reduce the total hardware cost associated with the proposed processor further and it can be made more economic than the classical CORDIC [24,25].…”

Section: Hardware Complexity and Design Flowmentioning

confidence: 98%

Virtually scaling-free adaptive CORDIC rotator

Maharatna

Troya

Banerjee

et al. 2004

IEE Proc., Comput. Digit. Tech.

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The authors propose a coordinate rotation digital computer (CORDIC) rotator algorithm that eliminates the problems of scale factor compensation and limited range of convergence associated with the classical CORDIC algorithm. In the proposed scheme, depending on the target angle or the initial coordinate of the vector, a scaling by 1 or 1= p 2 is needed that can be realised with minimal hardware. The proposed CORDIC rotator adaptively selects the appropriate iteration steps and converges to the final result by executing on average only 50% of the number of iterations required by the classical CORDIC. Unlike for the classical CORDIC, the value of the scale factor is completely independent of the number of executed iterations. Based on the proposed algorithm, a 16-bit pipelined CORDIC rotator was implemented. The silicon area of the fabricated pipelined CORDIC rotator core is 2.73 mm 2 . This is equivalent to 38 000 inverter gates in the used 0.25 mm BiCMOS technology. The average dynamic power consumption of the fabricated CORDIC rotator is 17 mW at a 2.5 V supply voltage and a 20 Ms=s throughput. Currently, this CORDIC rotator is used as a part of the baseband processor for a project that aims to design a single-chip wireless modem compliant with the IEEE 802.11a standard.

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Section: Hardware Complexity and Design Flowmentioning

confidence: 98%

Virtually scaling-free adaptive CORDIC rotator

Maharatna

Troya

Banerjee

et al. 2004

IEE Proc., Comput. Digit. Tech.

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“…The correction of the CFO will follow naturally by using a Numerically Controlled Oscillator (NCO) once has been estimated. In our implementation a novel CORDIC rotator is used in its accumulation mode of operation to compute the arctangent and its rotation mode is used to realize the NCO operation [10], [11], [12].…”

Section: B Carrier Frequency Offset Estimation and Correctionmentioning

confidence: 99%

“…Different parts of the present work have been published in different renowned conferences in short form [8], [10], [11], [19]. In this paper we provide a much more detailed and integrated view of the complete IRx solution.…”

Section: Introductionmentioning

confidence: 99%

Efficient Inner Receiver Design for OFDM-Based WLAN Systems: Algorithm and Architecture

Troya

Maharatna

Krstić

et al. 2007

IEEE Trans. Wireless Commun.

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Abstract-In this article we propose a complete solution for the so-called Inner Receiver of an OFDM-WLAN system based on the IEEE 802.11a standard. We concentrate our investigations on three key components forming the Inner Receiver namely, the Synchronizer, the Channel Estimator and the Digital Timing Loop. The main goal is the joint optimization of the signal processing algorithms along with the implementation friendly VLSI architecture required for these three key components in order to reduce power, area and latency, without compromising the performance excessively. We provide both the mathematical details and extensive computer simulations to validate our design.

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“…The method has been also incorporated in signal filtering [9,10], in matrix processing algorithms and in equation systems solvers [11][12][13][14]. It has also played a significant role in telecommunications [15][16][17][18], specially in the design of processors for wireless modems [19][20][21]. Moreover, several authors have proposed CORDIC for improving performance in image processing algorithms [22,23].…”

Section: Introductionmentioning

confidence: 99%