A 2.4 GHz Fully Integrated Linear CMOS Power Amplifier With Discrete Power Control

An, Kyungwon; Lee, Dong Hoon; Lee, Ockgoo; Kim, Hyungwook; Han, Jae‐Hung; Kim, Woonyun; Lee, Chang-Ho; Kim, Haksun; Laskar, J.

doi:10.1109/lmwc.2009.2022141

Cited by 65 publications

(14 citation statements)

References 6 publications

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“…The performance of the designed PA is summarized and compared to previously reported power combining CMOS PAs with the balanced structure in Table IV. Comparing with references with ([2], [11]) or without ( [3], [8], [10]) power mode control, the PAE at back-offs from P 1-dB is distinctly improved. Reference [8] exhibits high peak drain efficiency, but the linear efficiency was not so good and the drain efficiency decreased sharply at back-off region.…”

Section: Measurement Resultsmentioning

confidence: 78%

“…Considering that PAs operate on power back-off region most of the time, the high-efficiency range is necessary to be extended, thus the high average efficiency and long battery life can be acquired. Various technologies have been proposed on average efficiency improvement, such as envelope tracking techniques, Doherty power amplification, balanced transformer power combining and so on [5,6,7,8].…”

Section: Introductionmentioning

confidence: 99%

“…Transformer power combining technique can dynamically modulate the load by channel switching, hence it is able to keep the high efficiency at back-off region. There have been efforts to realize transformer power combining PA in CMOS process, with the power combiners adopting balanced structures [7,8,10,11]. Nevertheless, the high-efficiency range of a balanced structure is not fully developed due to its evendistributed power channels and rough power adjustment.…”

Section: Introductionmentioning

confidence: 99%

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Fully-integrated linear CMOS power amplifier with proportional series combining transformer for S-Band applications

et al. 2018

IEICE Electron. Express

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A novel proportional series combining transformer using for power amplifier (PA) is presented. Compared with balanced series combining structures, the high efficiency range is extended by sophisticated power adjusting and impedance tuning. As a proof-of-concept, a 2.5 V dual-channel PA with the proposed transformer was implemented in standard 0.18-µm CMOS process. The fabricated PA achieved a saturated output power (P sat ) of 28 dBm and a maximum linear output power (P 1-dB ) of 26.8 dBm with the power added efficiency (PAE) of 33.5% and 31%, respectively. With power mode control, the high efficiency range exceeded 8.2 dB. The PA satisfied EVM requirements of LTE 2.3 GHz 20 MHz/64-QAM signal and WLAN 802.11g signal, respectively. Keywords: power amplifier, transformer, power combiner, proportional, power mode control Classification: Integrated circuits

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Section: Measurement Resultsmentioning

confidence: 78%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Fully-integrated linear CMOS power amplifier with proportional series combining transformer for S-Band applications

et al. 2018

IEICE Electron. Express

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“…Transformers are the commonly utilized components for implementing a fully integrated high-power power amplifier (PA) as a power combiner which also serve the purpose of impedance transformation in order to maximize the efficiency. An et al (2009) proposed a different architecture of the class-AB PA design that consisted of an input balun and a parallel combining transformer (PCT), as depicted in Figure 14 [46]. Cascode topology was applied at the driver and power stages to prevent excessive voltage stress on the device, as it undergoes breakdown at high voltages under an excessive voltage stress [46].…”

Section: Power Combining Architecturementioning

confidence: 99%

“…An et al (2009) proposed a different architecture of the class-AB PA design that consisted of an input balun and a parallel combining transformer (PCT), as depicted in Figure 14 [46]. Cascode topology was applied at the driver and power stages to prevent excessive voltage stress on the device, as it undergoes breakdown at high voltages under an excessive voltage stress [46]. The PCT concept was applied by combining the three identical PAs in parallel for the layout of the transformers, which was more compact but displayed an average chip size of 2 mm 2 [47].…”

Section: Power Combining Architecturementioning

confidence: 99%

Design Architectures of the CMOS Power Amplifier for 2.4 GHz ISM Band Applications: An Overview

et al. 2019

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Power amplifiers (PAs) are among the most crucial functional blocks in the radio frequency (RF) frontend for reliable wireless communication. PAs amplify and boost the input signal to the required output power. The signal is amplified to make it sufficiently high for the transmitter to propagate the required distance to the receiver. Attempted advancements of PA have focused on attaining high-performance RF signals for transmitters. Such PAs are expected to require low power consumption while producing a relatively high output power with a high efficiency. However, current PA designs in nanometer and micrometer complementary metal–oxide semiconductor (CMOS) technology present inevitable drawbacks, such as oxide breakdown and hot electron effect. A well-defined architecture, including a linear and simple functional block synthesis, is critical in designing CMOS PA for various applications. This article describes the different state-of-the art design architectures of CMOS PA, including their circuit operations, and analyzes the performance of PAs for 2.4 GHz ISM (industrial, scientific, and medical) band applications.

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Envelope Tracking Techniques Applied to a Fully Monolithic Silicon‐BasedRFPower Amplifier System

Lie

Lopez

2014

Wiley Encyclopedia of Electrical and Electronics Engineering

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This article presents a detailed design example of applying envelope tracking (ET) techniques on a highly monolithic silicon‐based radio‐frequency (RF) power amplifier (PA) to form a high‐efficiency and low‐cost ET‐PA system. An envelope‐tracked SiGe cascode PA with an integrated complementary metal–oxide–semiconductor (CMOS) envelope modulator for mobile WiMAX and 3GPP long‐term evolution (LTE) transmitters (TXs) is shown in this work. The entire ET‐based RF PA system delivers the linear output power of 22.3/24.3 dBm with the overall power‐added efficiency (PAE) of 33%/42% at 2.4 GHz for the WiMAX 64QAM and the 3GPP LTE 16QAM modulations, respectively. Additionally, it exhibits a highly efficient broadband characteristic for multiband applications. Compared with the conventional fixed‐supply cascode PA, our ET‐based cascode PA meets the WiMAX/LTE spectral mask and error vector magnitude (EVM) spec at close to its P 1dB compression without the need for predistortion. The SiGe PA and the CMOS envelope modulator are both designed and fabricated in the TSMC 0.35‐μm SiGe bipolar CMOS (BiCMOS) process on the same die. This work represents an essential integration step toward achieving a fully monolithic ET‐based TX for wideband wireless applications.

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A 2.4 GHz Fully Integrated Linear CMOS Power Amplifier With Discrete Power Control

Cited by 65 publications

References 6 publications

Fully-integrated linear CMOS power amplifier with proportional series combining transformer for S-Band applications

Fully-integrated linear CMOS power amplifier with proportional series combining transformer for S-Band applications

Design Architectures of the CMOS Power Amplifier for 2.4 GHz ISM Band Applications: An Overview

Envelope Tracking Techniques Applied to a Fully Monolithic Silicon‐BasedRFPower Amplifier System

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