A 237mW aDSL2+ CO Line Driver in Standard 1.2V 0.13¿m CMOS

Abstract

The persistent growing demand for broadband internet has triggered the telephone companies to improve the xDSL standards to bridge the last mile between the central office (CO) and the end user. The aDSL2+ standard doubles the bandwidth of an aDSL system to 2.2MHz and hence increases the bit rate up to 24Mb/s. The high crest factor (CF) of discrete multi-tone (DMT) modulated signals poses serious problems for an efficient and low-cost implementation of the line driver [1]. In the nano-electronic era, the line driver remains more than ever the major bottleneck for lowering the cost and power. The low supply voltages coming from nanometer technologies increase the current density in the line driver. Together with the high CF and the doubled bandwidth, a highly efficient aDSL2+ line driver in a low-voltage, lowcost CMOS technology seems to be a contradiction.The aDSL2+ line driver presented here is a self oscillating power amplifier (SOPA) with a high-voltage output buffer in standard 1.2V 0.13µm CMOS. A SOPA line driver can be quite successful in sub-micrometer technologies, since it can drive DMT signals with a high CF efficiently [2]. But, as with any power amplifier, its efficiency and reliability drop with decreasing supply voltage. An aDSL2+ system delivers an average of 20dBm to a 100Ω twisted-pair line. Lowering the supply voltage thus results in an increased current density for a constant output power. This in turn increases hot carrier generation and electro-migration, both of which affect the reliability of the driver. The large current also results in a drop in efficiency because of the increased switching and conduction losses of the driver. Moreover, the large CF causes the driver to put signals with a high voltage-swing on the line. Since the output voltage-swing of the driver is limited by its supply voltage, a transformer with a high turns-ratio has to be used. The large return signal attenuation then limits the practical use of the line driver.To overcome these low-voltage issues, a high-voltage output buffer is included in the SOPA architecture. The high-voltage buffer is, like all the building blocks in this line driver, designed in a standard, submicron CMOS technology. Therefore, it is demonstrated that the use of extra mask sets to create high-voltage devices, such as LDMOS or thick-oxide transistors, can be avoided. This simplicity makes this line driver very attractive in terms of cost and the prospects for integration. Figure 29.4.1 shows the block diagram of the line driver. The single SOPA comprises a continuous-time RC integrator followed by a non-clocked comparator. The SOPA is thus an asynchronous switching-type amplifier. The high-voltage buffer converts the output of the comparator to high voltage levels. The output of this buffer is fed back to the integrator using a loop filter. Since the integrator and comparator operate at the low, nominal supply voltage of the technology, the output of this buffer needs to be down converted within the voltage limits of the technology. This down ...

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High-/Mixed-Voltage RF and Analog CMOS Circuits Come of Age

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