A 3.3 V 625 kHz switched-current multiplier

A current-mode analog multiplier/divider based on CCCDTA

“…They can be found in many tasks: for instance, modulation, measurement, instrumentation, and control systems [1][2][3]. Many techniques to implement multiplier and divider have been presented as follows.…”

A Four Quadrant S2I Switched-Current Multiplier

“…Starting from the algorithm introduced by Leenaerts et al [1], an alternative circuit implementation is now presented. The product of two currents and fed at the inputs of the multiplier is accomplished by evaluating the left-hand side of (9):…”

“…where and are the output and input currents, respectively, is a constant current related to the bias voltage is the output offset error, and is the input offset error. The approach introduced in [1] consists of using the same squarer circuit many times while storing intermediate results in the SI memory cells.…”

“…However, although some nonfiltering applications of SI circuits have been developed [10], [11], to the best knowledge of the authors, only one SI multiplier has ever been presented until now [1]. The complexity of this circuit required one extra clock phase besides the normal clock phases used in common second generation SI cells [10], two explicit capacitors to cope with clock feedthrough problems, and a regulated-cascode architecture to deal with channel modulation effects [1].…”

“…One smart aspect of Leenaert's [1] multiplier is that any quadratic term is evaluated by using the same squarer circuit in different clock phases. This avoids the need for precisely matched squarer circuits as is the case in some continuous time current multipliers [2].…”