Optical Fiber Communication Conference (OFC) 2019 2019
DOI: 10.1364/ofc.2019.m1c.4
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A 300mm CMOS-compatible PECVD silicon nitride platform for integrated photonics with low loss and low process induced phase variation

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Cited by 11 publications
(10 citation statements)
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“…We note that the coupling loss was as high as ∼15 dB∕facet, mainly due to imperfect polishing of the facets (Ultrapol polisher); therefore, inverse tapers will be used in future devices to reduce coupling loss. Although we used LPCVD for depositing Si 3 N 4 , which requires processing temperature around 800°C and thus making it incompatible with the back-end-of-the-line (BEOL) CMOS processes [19,50,51], to make the device fully compatible with CMOS electronics we can equally use the well-established plasma-enhanced chemical vapor deposition (PECVD)-based silicon nitride layer [19,24,50,51]. The schematic of the waveguide cross section and an SEM image are shown in Figs.…”
Section: Resultsmentioning
confidence: 99%
“…We note that the coupling loss was as high as ∼15 dB∕facet, mainly due to imperfect polishing of the facets (Ultrapol polisher); therefore, inverse tapers will be used in future devices to reduce coupling loss. Although we used LPCVD for depositing Si 3 N 4 , which requires processing temperature around 800°C and thus making it incompatible with the back-end-of-the-line (BEOL) CMOS processes [19,50,51], to make the device fully compatible with CMOS electronics we can equally use the well-established plasma-enhanced chemical vapor deposition (PECVD)-based silicon nitride layer [19,24,50,51]. The schematic of the waveguide cross section and an SEM image are shown in Figs.…”
Section: Resultsmentioning
confidence: 99%
“…2008 [66] 2000 × 140 633 25-50 0.2 2011 [60] 2800 × 100 1550 500 0.09 2013 [67] 800 × 220 900 -0.62 2013 [68] 700 × 100 600 35 0.51 2013 [63] 1800 × 190 1550 115 0.04 2013 [69] 4000 × 2500 3700 200 2.1 2014 [70] 1000 × 400 1270 -0.32 2015 [71] 2700 × 950 2600 230 0.60 2015 [61] 2000 × 200 1550 50 0.3 2016 [72] 1150 × 1350 1598 238 -2017 [73] 2500 × 730 1550 115 0.008 ± 0.001 2019 [74] 350 × 180 532 / 1.36…”
Section: Silica Waveguidesmentioning
confidence: 99%
“…20 In particular, one of the difficulties that has been associated to phased arrays is the so-called coherence length of the waveguides. 21 Due to manufacturing induced variations in waveguide widths and ill-controlled layer thicknesses or side-wall roughness, the optical path length of waveguides shows small deviations from their design target, that can vary from waveguide to waveguide and chip to chip. In order to correct for these, phase tuners need not only to apply the phase required to generate a given field profile, as can be predictively determined with an algorithm, but also need to correct for these fabrication induced phase shifts.…”
Section: Lsfm With Silicon Nitride Photonic Integrated Circuitsmentioning
confidence: 99%
“…State-of-the-art fabrication tolerances have however undergone sufficient progress so that the coherence length of silicon nitride may be long enough to implement scaled phased arrays without requiring correction. 20,21 This is analyzed in more details below for the specific photonic integrated circuit (PIC) architecture considered here.…”
Section: Lsfm With Silicon Nitride Photonic Integrated Circuitsmentioning
confidence: 99%
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