A 32 b 90 nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation From Sub-Threshold to High Performance

Craig, Kyle; Shakhsheer, Yousef; Arrabi, Saad; Khanna, Sudhanshu; Lach, John; Calhoun, Benton H.

doi:10.1109/jssc.2013.2285384

Cited by 24 publications

(11 citation statements)

References 19 publications

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“…To minimize standby power, the supply voltage needs to be reduced to the minimum voltage level at which data can be retained in standby mode. Conversely, in active mode, the supply voltage should be increased for better performance and stable operation [4,5]. This implies that the power management unit in miniature sensor systems should also be capable of handling a wide voltage range.…”

Section: Introductionmentioning

confidence: 99%

A Wide Load Current and Voltage Range Switched Capacitor DC–DC Converter with Load Dependent Configurability for Dynamic Voltage Implementation in Miniature Sensors

Saif

Lee

et al. 2018

Energies

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Advancements in low power circuits and batteries have enabled the design of miniature sensors with tiny batteries. In such systems, implementing dynamic voltage scaling (DVS) is crucial for maximizing system lifetime. In this paper, a new switched capacitor (SC) converter that is capable of handling a wide range of load currents and output voltages is presented for on-chip DVS implementation. The proposed converter consists of multi-ratio multi-leaf SC stages and reconfigurable interconnect, enabling fine voltage resolution. The stage interconnect scheme enables cascaded or parallel connection of stages. The multi-leaf structure allows load-dependent switch size selection, offering a better trade-off between losses over a wide load range. A limited-voltage-swing switch-driving scheme allows efficient down-conversion from high battery voltage input. A prototype was fabricated in a 180 nm process, providing an output voltage with effective resolution of 16 mV over a load current range of 300 nA to 300 μA (1000×) from a 4 V battery. Efficiency greater than 62% and a peak efficiency of 77% are achieved under a light load (500 nA) over a voltage range of 400 mV to 1.6 V. Efficiency greater than 64% and a peak efficiency of 72% are achieved under a heavy load (200 μA) over a voltage range of 700 mV to 1.6 V.

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Section: Introductionmentioning

confidence: 99%

A Wide Load Current and Voltage Range Switched Capacitor DC–DC Converter with Load Dependent Configurability for Dynamic Voltage Implementation in Miniature Sensors

Saif

Lee

et al. 2018

Energies

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“…Awaiting the ultimate power-tree CMOS integration, [6] proposes a reasonable trade-off between PCB and Si area saving where only power-rail selectors are integrated in the digital die to address individual power islands from a discrete set of shared external converters. Fig.…”

Section: Introductionmentioning

confidence: 99%

LDO-Assisted Voltage Selector Over 0.5-to-1V VDD Range for Fine Grained DVS in FDSOI 28nm with 200ns/V Controlled Transition

Quelen

Marega

Bouquet

et al. 2018

ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)

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This paper presents a 95% power-efficient dutycycled LDO-assisted voltage selector (LAVS) for fine grained spatial and temporal voltage scaling in FDSOI 28nm technology. LAVS enables 200ns/V controlled transitions between three power rails over a 0.5-to-1V range while maintaining the digital activity of the supplied load. During transitions, current and voltage detections are proposed to protect power rails from reverse current. LAVS has a 13% Si area overhead to drive a 0.2mm 2 digital load. Thanks to a 100MHz-bandwidth LDO, which is only enabled during transition to save power consumption, the voltage selector also maintains a smooth voltage transition even if a digital load suddenly changes its activity factor (4mV/mA load transient). LAVS achieves 30pJ energy dissipation per voltage transition which is negligible compared to the power consumed by the digital load (50mW@0.2mm 2). This therefore allows a MHz dynamic voltage scaling rate.

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“…Voltage scaling is well known to be an effective way to reduce dynamic power consumption of an integrated circuit . However, due to the degraded performance and robustness issues, the voltage scaling technique is often applied in a selective way in multi‐supply voltage designs where some sections run at the nominal supply voltage ( V DDH ) to maximize the speed and/or to assure reliable operation , whereas noncritical sections can operate at lower supply voltage ( V DDL ) to optimize energy consumption. The power supply of noncritical sections of the system could be aggressively scaled down to the subthreshold/near‐threshold region in order to optimize energy consumption .…”

Section: Introductionmentioning

confidence: 99%

Low energy/delay overhead level shifter for wide‐range voltage conversion

Lanuzza

Crupi

Rao

et al. 2016

Circuit Theory & Apps

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Multi-supply voltage systems on chip have been widely explored for energy-efficient elaborations. A main challenge of multi-supply voltage designs is the interfacing of digital signals coming from ultra-low-voltage core logics to higher power supply domains and/or to input/output circuits. In this work, we propose an energy/delay-efficient level shifter architecture that is capable of converting extremely low levels of input voltages to the nominal voltage domain. In order to limit static power, the proposed circuit is based on the single-stage differential cascode voltage switch scheme. To improve switching speed and dynamic energy consumption, our design dynamically adapts the current sourced by the pull-up network on the basis of the occurring transition. A test chip was fabricated in 180 nm complementary metal–oxide–semiconductor technology to verify the proposed technique. Measurement results show that our design is capable of converting 100 mV of input voltages to 1.8 V, while assuring an average propagation delay of about 26 ns, an average static power of 100 pW, and an energy per transition of 140 fJ for the target voltage-level conversion from 0.4 to 1.8 V

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A 32 b 90 nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation From Sub-Threshold to High Performance

Cited by 24 publications

References 19 publications

A Wide Load Current and Voltage Range Switched Capacitor DC–DC Converter with Load Dependent Configurability for Dynamic Voltage Implementation in Miniature Sensors

A Wide Load Current and Voltage Range Switched Capacitor DC–DC Converter with Load Dependent Configurability for Dynamic Voltage Implementation in Miniature Sensors

LDO-Assisted Voltage Selector Over 0.5-to-1V VDD Range for Fine Grained DVS in FDSOI 28nm with 200ns/V Controlled Transition

Low energy/delay overhead level shifter for wide‐range voltage conversion

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