A 320 MHz, 1.5 mW at 1.35 V CMOS PLL for microprocessor clock generation

We present a fully integrated detector suitable for active tracking of interventional devices in MR-guided interventions. The single-chip microsystem consists of a detection coil, a tuning capacitor, an intermediate frequency downconversion receiver, and a phase-locked-loop-based frequency synthesizer. Thanks to the integrated mixer, the chip output stage delivers an analog frequency-downconverted NMR signal in the frequency range from 0 to 200 kHz. The microchip, realized in a standard complementary metal oxide semiconductor technology, has a size of 1 3 2 3 0.74 mm 3 and operates at a frequency of 63 MHz (i.e., in 1.5 T clinical scanners). Tests in a standard clinical scanner demonstrate the compatibility of the complementary metal oxide semiconductor microchip with clinical MRI systems. Using a solid sample of cis-polyisoprene having a size of 1 3 1.9 3 0.8 mm 3 as internal signal source, the detector achieves a three-dimensional isotropic spatial resolution of 0.15 mm in a measuring time of 100 ms. Magn Reson Med 67:290-296,

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“…1d. The phase frequency detector incorporates a delay element in the reset path to minimize its dead zone as suggested in Ref 27…”

Section: Methodsmentioning

confidence: 99%

Integrated active tracking detector for MRI‐guided interventions

Anders

SanGiorgio

Deligianni

et al. 2011

Magnetic Resonance in Med

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“…Thus the PFD critical paths should have sharp rising and falling edges so that the minimum reset delay is achievable. As standard cells are not fast enough, the PFD is a hll-custom design based on the structure proposed in reference [7]. Figure 7 shows approaches that can be used to improve matching.…”

Section: Pfd and Charge Pumpmentioning

confidence: 99%

A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13/spl mu/m CMOS

Chen¹,

Huang²

2005

ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005.

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A 4GHz integer-N frequency synthesizer is realized in a 0.13pm CMOS technology. It has a 400kHz reference frequency and 40kHz loop bandwidth such that 2GHz quadrature LO signals can be generated after a divide-by-two, with channel raster of 200kHz. The measured in-band phase noise is -74dBcMz @4kHz offset. A self-regulated charge pump is proposed to improve matching as well as charge sharing. Reference spurs are thereby kept below -55dBc over the VCO tuning voltage from rail to rail.The requirements for UMTS transceiver have been fulfilled with an overall power consumption of 9.5mW, which is the lowest reported to date. Core area of the chip is as small as 0.2mm2.

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“…PLL and DLL jitter is dominated by power supply noise [7]. The issues addressed by the analog supply macro-model include supply isolation, signal return current strategy, and decoupling capacitor methodology.…”

Section: Analog Power Macro-modelmentioning

confidence: 99%

Macro-modeling concepts for the chip electrical interface

Amick

Gauthier

Liu

2002

Proceedings of the 39th Conference on Design Automation - DAC '02

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The power delivery network is made up of passive elements in the distribution network, as well as the active transistor loads. A chip typically has three types of power supplies that require attention: core, I/O, and analog. Core circuits consist of digital circuits and have the largest current demand. In addition to all of the system issues/models for the core, modeling the I/O subsystem has the additional requirement of modeling return paths and discontinuities. The analog circuits present yet a different challenge to the macromodeling of the supply network because they place a tight demand on supply variations. This paper presents a design methodology on how to generate macro-models of the entire chip electrical interface. This methodology can be used by the chip, package, and system designers and is being used to design high-reliability servers.

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A 320 MHz, 1.5 mW at 1.35 V CMOS PLL for microprocessor clock generation

Cited by 26 publications

References 1 publication

Integrated active tracking detector for MRI‐guided interventions

Integrated active tracking detector for MRI‐guided interventions

A 9.5mW 4GHz WCDMA frequency synthesizer in 0.13/spl mu/m CMOS

Macro-modeling concepts for the chip electrical interface

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