A 4-Mbit Non-Volatile Chalcogenide-Random Access Memory Designed for Space Applications

Li, Bin; Bumgarner, A.; Pirkl, Dan; Stobie, James A.; Neiderer, W.; Graziano, Mariagrazia; Burcin, L.; Storey, T.; Orlowsky, B.; Hunt, K.; Rodgers, J.; Maimon, J.

doi:10.1109/nvmt.2006.378879

Cited by 7 publications

(3 citation statements)

References 21 publications

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“…This discovery fueled renewed interest in solid-state memory devices based on PCMs. Numerous companies-among them BAE Systems (9), Hitachi (10), IBM (11), Intel (12), Macronix (11), NXP (13), Qimonda (11), Renesas (10), Samsung (14), and STMicroelectronics (15)-started research and development projects to investigate phase change random access memory (PCRAM) technology. The field advanced substantially, with the number of patents going from fewer than 10 between 1966 and 1997 to more than 100 in 2006 and 2007 (16).…”

Section: Introduction and Historymentioning

confidence: 99%

Phase change materials

Raoux¹,

et al. 2012

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Section: Introduction and Historymentioning

confidence: 99%

Phase change materials

Raoux¹,

et al. 2012

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“…This option was selected since phase-change memory device operation is fairly well-understood and could provide a good example of integration of the university-level exotic materials processing with CMOS processing. Phase-change chalcogenide-based nonvolatile memory research has attracted considerable interest recently due to the potential device scalability for a nextgeneration solution to replace Flash memory, and its inherent radiation resistance [4][5][6]. Investigation into new nonvolatile memory devices utilizing experimental materials requires fabrication of test chips to demonstrate functionality and proofof-concept.…”

Section: Introductionmentioning

confidence: 99%

Integration of IC Industry Feature Sizes with University Back-End-of-Line Post Processing: Example Using a Phase-Change Memory Test Chip

Regner

Balasubramanian

Cook

et al. 2009

2009 IEEE Workshop on Microelectronics and Electron Devices

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Abstract-We have demonstrated that back-end-of-line (BEOL)processing can successfully be performed in a university environment on die that have been fabricated at a foundry. This processing option enables universities to integrate state-of-the-art feature sizes with low resolution photolithography capabilities, such as achieved with a contact aligner, typically available at universities. With this capability, new device technologies and materials can be explored at the university level, where the basic research on the technology can occur without the timelines and expectations that are placed on product development in an industrial setting. By incorporating state-of-the-art feature sizes with these research efforts, the research results will be more applicable and more easily transferable to an industrial environment.In our project, we have demonstrated the integration of a foundry processed chip with the BEOL university processing through the fabrication of a small phase-change memory array with CMOS access transistors and addressing circuitry wherein the phase-change memory material was processed BEOL at Boise State University.

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“…The aerospace community considers chalcogenide-based phase-change memory (PCM) as a likely candidate technology in future of NVM for space applications [2]. Existing memory technologies like Dynamic Random Access memory (DRAM) and Flash memory work on the concept of charge storage [3].…”

Section: Introductionmentioning

confidence: 99%

A new approach to the design, fabrication, and testing of chalcogenide-based multi-state phase-change nonvolatile memory

Ande

Busa

Balasubramanian

et al. 2008

2008 51st Midwest Symposium on Circuits and Systems

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-A new approach to developing, fabricating, and testing chalcogenide-based multi-state phase-change nonvolatile memory (NVM) is presented. A test chip is fabricated through the MOSIS service. Then post processing, in the Boise State University lab, is performed on the chip to add the chalcogenide material that forms the NVM. Each memory bit consists of an NMOS access transistor and the chalcogenide material placed between the metal3 of the test chip, connected to the access device, and a common, to all memory bits, electrode. This paper describes the design of the memory bit and of the test structures used for reliability and radiation testing. Fabrication and postprocessing of the memory are also discussed.

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A 4-Mbit Non-Volatile Chalcogenide-Random Access Memory Designed for Space Applications

Cited by 7 publications

References 21 publications

Phase change materials

Phase change materials

Integration of IC Industry Feature Sizes with University Back-End-of-Line Post Processing: Example Using a Phase-Change Memory Test Chip

A new approach to the design, fabrication, and testing of chalcogenide-based multi-state phase-change nonvolatile memory

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