A 70-MHz 70-dB-gain VGA with automatic continuous-time offset cancellation

Guo, Chunbing; Luong, Howard C.

doi:10.1109/mwscas.2000.951648

Cited by 6 publications

(1 citation statement)

References 4 publications

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“…A 10 pF capacitor is enough to realize the time constant. Therefore, it is possible to integrate the DCOC circuit for the small size of the MOS resistor OE12; 13 .…”

Section: Dcocmentioning

confidence: 99%

Design of a high linearity and high gain accuracy analog baseband circuit for DAB receiver

Ma¹,

Wang²,

Xu³

et al. 2015

J. Semicond.

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An analog baseband circuit of high linearity and high gain accuracy for a digital audio broadcasting receiver is implemented in a 0.18-m RFCMOS process. The circuit comprises a 3rd-order active-RC complex filter (CF) and a programmable gain amplifier (PGA). An automatic tuning circuit is also designed to tune the CF's pass band. Instead of the class-A fully differential operational amplifier (FDOPA) adopted in the conventional CF and PGA design, a class-AB FDOPA is specially employed in this circuit to achieve a higher linearity and gain accuracy for its large current swing capability with lower static current consumption. In the PGA circuit, a novel DC offset cancellation technique based on the MOS resistor is introduced to reduce the settling time significantly. A reformative switching network is proposed, which can eliminate the switch resistor's influence on the gain accuracy of the PGA.The measurement result shows the gain range of the circuit is 10-50 dB with a 1-dB step size, and the gain accuracy is less than ˙0.3 dB. The OIP3 is 23.3 dBm at the gain of 10 dB. Simulation results show that the settling time is reduced from 100 to 1 ms. The image band rejection is about 40 dB. It only draws 4.5 mA current from a 1.8 V supply voltage.

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“…A 10 pF capacitor is enough to realize the time constant. Therefore, it is possible to integrate the DCOC circuit for the small size of the MOS resistor OE12; 13 .…”

Section: Dcocmentioning

confidence: 99%