Proceedings of the IEEE 1988 Custom Integrated Circuits Conference 1988
DOI: 10.1109/cicc.1988.20898
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A 72 K CMOS channellers gate array with embedded 1 Mbit dynamic RAM

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Cited by 9 publications
(5 citation statements)
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“…on many embedded DRAMs-large-scale integrated devices that merge dynamic RAM and logic. [1][2][3][4][5][6] As embedded DRAMs find increasing applications, their testing has become a focus of attention. Embedded DRAMs have several features that distinguish them from commodity DRAMs, such as wider I/O buses and a wide variety of configurations.…”
Section: Recently Researchers Have Reportedmentioning
confidence: 99%
“…on many embedded DRAMs-large-scale integrated devices that merge dynamic RAM and logic. [1][2][3][4][5][6] As embedded DRAMs find increasing applications, their testing has become a focus of attention. Embedded DRAMs have several features that distinguish them from commodity DRAMs, such as wider I/O buses and a wide variety of configurations.…”
Section: Recently Researchers Have Reportedmentioning
confidence: 99%
“…14 However, research on integrating DRAM and ASIC (application-specific integrated circuit) logic is relatively new. 15 Nevertheless, products with merged DRAM/logic technology are already found in the integrated graphic controller plus frame buffer chip used in many notebook computers and in the integrated CPU plus DRAM chip (the Mitsubishi 32R/D) 16 targeted at embedded applications. Moreover, DRAM and logic integration has already been achieved in high-functionality DRAM design.…”
Section: Merged Dram/logic Technologymentioning
confidence: 99%
“…This type of cell is well suited for ASM (Application Specific Memory) which will be described in the next section. Planar cell with multiple (double) poly structures is also suitable for memory rich applications [4]. Gate capacitor storage cell approach can be fully compatible to logic process providing relatively high density [5].…”
Section: Technology Integrationmentioning
confidence: 99%
“…In other words, embedded memory is a determinant of total chip yield to the extent that memory portion has higher device density weighted by its Si area. 4 For a large memory embedded VLSI, memory redundancy is helpful to enhance the chip yield. Therefore, the embedded memory testing combined with redundancy scheme is an important issue.…”
Section: Yield and Testingmentioning
confidence: 99%
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