A 9 dB Noise Figure Fully Integrated 79 GHz Automotive Radar Receiver in 40 nm CMOS Technology

Murakami, Tomotoshi; Hasegawa, N.; Utagawa, Yoshiyuki; Arai, Tomomi; Yamaura, Shin Ichi

doi:10.1109/rfic.2019.8701748

Cited by 12 publications

(2 citation statements)

References 7 publications

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“…For high system sensitivity, the receiver front-end is required to have a high amplitude gain and a low noise contribution. Many designs [7][8][9][10][11] in CMOS technology for radar applications have been reported. Reference [7] presents an LNA design with a gain of 20 dB and a noise figure (NF) of 4.6 dB.…”

Section: Introductionmentioning

confidence: 99%

“…Reference [9] realizes an LNA with a gain of 17.3 dB and an NF of 7.4 dB using the microstrip lines as inductive components, which occupy more chip areas. References [10,11] adopt a passive mixer to realize a good NF of 9 and 8.7 dB, respectively. However, the LNA designs using the traditional neutralization technique have room for gain improvement.…”

Section: Introductionmentioning

confidence: 99%

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A 77-GHz High Gain Low Noise Receiver for Automatic Radar Applications

Cheng

Mei

et al. 2021

Electronics

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In this paper, a high gain 77-GHz receiver with a low noise figure (NF) was designed and implemented in a 40-nm CMOS process. With the purpose of making better use of active devices, an extra inductor, Ld, is adopted in the new neutralization technique. The three-stage differential low noise amplifier (LNA) using the proposed technique improves the voltage gain and reduces the NF. The receiver design utilizes an active double-balanced Gilbert mixer with a transformer coupling network between the transconductance stage and the switch stage. The flicker noise contribution from the switch MOS transistors is largely reduced due to the low DC current of the switch pairs. The LO signal is provided by an on-chip fundamental voltage-controlled oscillator (VCO) with a tuning range from 70.5 to 78.1 GHz. A conversion gain of 32 dB and a NF of 11.86 dB are achieved at 77 GHz by the designed receiver. The LNA as well as the mixer consume a total DC power of 33.2 mW and occupy a core size of 1 × 0.38 mm2.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A 77-GHz High Gain Low Noise Receiver for Automatic Radar Applications

Cheng

Mei

et al. 2021

Electronics

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Toward a fully integrated automotive radar system-on-chip in 22 nm FD-SOI CMOS

Ritter

2021

Int. J. Microw. Wireless Technol.

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Next-generation automotive radar sensors are increasingly becoming sensitive to cost and size, which will leverage monolithically integrated radar system-on-Chips (SoC). This article discusses the challenges and the opportunities of the integration of the millimeter-wave frontend along with the digital backend. A 76–81 GHz radar SoC is presented as an evaluation vehicle for an automotive, fully depleted silicon-over-insulator 22 nm CMOS technology. It features a digitally controlled oscillator, 2-millimeter-wave transmit channels and receive channels, an analog base-band with analog-to-digital conversion as well as a digital signal processing unit with on-chip memory. The radar SoC evaluation chip is packaged and flip-chip mounted to a high frequency printed circuit board for functional demonstration and performance evaluation.

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Functionality Verification Experiments of an Integrated Radar Front-End

2020

2020 International Conference on Microwave and Millimeter Wave Technology (ICMMT)

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A 9 dB Noise Figure Fully Integrated 79 GHz Automotive Radar Receiver in 40 nm CMOS Technology

Cited by 12 publications

References 7 publications

A 77-GHz High Gain Low Noise Receiver for Automatic Radar Applications

A 77-GHz High Gain Low Noise Receiver for Automatic Radar Applications

Toward a fully integrated automotive radar system-on-chip in 22 nm FD-SOI CMOS

Functionality Verification Experiments of an Integrated Radar Front-End

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