A-BCD: An economic 100 V RESURF silicon-on-insulator BCD technology for consumer and automotive applications

Pol, J.A. van der; Ludikhuize, A.W.; Huizing, H.G.A.; Velzen, Bart van; Hueting, R.J.E.; Mom, J.F.; Lijnschoten, G. van; Hessels, G.J.J.; Hooghoudt, E.F.; Huizen, R. van; Swanenberg, M.; Egbers, J.H.H.A.; Elshout, Frank van den; Koning, J. J.; Schligtenhorst, H.; Soeteman, J.

doi:10.1109/ispsd.2000.856836

Cited by 50 publications

(23 citation statements)

References 4 publications

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“…The device is processed in SOItechnology [16], and it has different mask widths W mask , and lengths L PSOD and L LOCOS . For the reference device of W mask = 20 μm, L PSOD = 2.6 μm and L LOCOS = 3.5 μm, the resistance R drift is equal to 330 Ω.…”

Section: Resultsmentioning

confidence: 99%

Compact modeling of high-voltage LDMOS devices including quasi-saturation

Aarts

Kloosterman

2006

IEEE Trans. Electron Devices

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Abstract-The surface-potential-based compact transistor model, MOS Model 20 (MM20), has been extended with quasisaturation, an effect that is typical for LDMOS devices with a long drift region. As a result, MM20 extends its application range from low-voltage LDMOS devices up to high-voltage LDMOS devices of about 100V. In this paper, the new dc model of MM20 including quasi-saturation is presented. The addition of velocity saturation in the drift region ensures the current to be controlled by either the channel region or the drift region. A comparison with dc measurements on a 60V LDMOS device shows that the new model provides an accurate description in all regimes of operation, ranging from sub-threshold to super-threshold, in both the linear and saturation regime. Thus, owing to the inclusion of quasi-saturation also the regime of high gate and high drain bias conditions for high-voltage LDMOS devices is accurately described.

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Section: Resultsmentioning

confidence: 99%

Compact modeling of high-voltage LDMOS devices including quasi-saturation

Aarts

Kloosterman

2006

IEEE Trans. Electron Devices

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“…Some of these processes achieve HV handling with thick gate oxide thickness. In such processes, the threshold voltage of HV transistors is high, and thus the current drive capabilities are low [1,2]. To mitigate the low current drive and large threshold voltage problem, many companies offer HV transistors with standard oxide thickness [3].…”

Section: Introductionmentioning

confidence: 99%

An RC-triggered ESD clamp for high-voltage BCD CMOS processes

Koçer¹

2017

Turk J Elec Eng & Comp Sci

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This paper presents a novel RC-triggered, field-effect transistor (FET)-based power clamp that can be used in high-voltage complementary metal oxide semiconductor (CMOS) processes. A simple two-stage design provides a fast trigger while keeping the clamp transistor on for much longer than the triggering duration without the need for an additional digital latching circuit. As the presented technique does not require any digital circuits, it is especially useful in bipolar-CMOS-DMOS (BCD) processes, where the implementation of digital blocks is difficult due to the limited gateto-source voltage of the laterally diffused metal oxide semiconductor (LDMOS) transistors. The proposed architecture is implemented in a 0.25-µ m BCD process offered by TSMC. Simulation results show that Class 3A-level electrostatic discharge (ESD) protection can be achieved with an 8-mm-wide device while keeping all gate-to-source voltage values below the recommended 5-V limit. As the circuit operation depends on the well-modeled transient behavior of transistors, the proposed technique can be extended to other ESD ratings and can also be migrated to other processes without the need of extensive hardware verification.

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“…The importance of the High-Voltage (HV-MOS) as a device in state-of-the-art applications has been reported extensively in scientific literature [1][2][3][4][5]. One of the reasons is that modern HV-MOS devices, like Lateral doubleDiffusion MOS (LDMOS), may be integrated together with low-voltage modules in CMOS processes [3,5].…”

Section: Introductionmentioning

confidence: 99%

“…One of the reasons is that modern HV-MOS devices, like Lateral doubleDiffusion MOS (LDMOS), may be integrated together with low-voltage modules in CMOS processes [3,5]. The systems, where such devices are used, range from power components for automotive and consumer products [2] up to radio frequency applications [6][7][8]. Therefore, compact modeling of HV-MOS is an enabling factor that will help in predicting how these devices can be optimally integrated in complex architectures [9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26].…”

Section: Introductionmentioning

confidence: 99%

RF Compact Modeling of High-voltage MOSFETs

et al. 2012

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The High-Voltage MOSFET is used in a wide variety of applications covering from power systems up to RF-IC. Compact models that describe the high-frequency behavior of the device are required to predict high-frequency operation and switching capabilities of these elements in HV state-of-the-art systems. In this paper, an RF model is presented and verified against extensive Y-parameter measurements, which were carried out on a long channel Lateral doubleDiffusion MOS device. Assessment of the model with measurements confirms the validity of this approach.

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A-BCD: An economic 100 V RESURF silicon-on-insulator BCD technology for consumer and automotive applications

Cited by 50 publications

References 4 publications

Compact modeling of high-voltage LDMOS devices including quasi-saturation

Compact modeling of high-voltage LDMOS devices including quasi-saturation

An RC-triggered ESD clamp for high-voltage BCD CMOS processes

RF Compact Modeling of High-voltage MOSFETs

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