A CAM-based keyword match processor architecture

Bu, Long; Chandy, John A.

doi:10.1016/j.mejo.2005.10.015

Cited by 8 publications

(6 citation statements)

References 22 publications

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“…Specialized hardware like FPGAs have been proposed to match exact patterns with Bloom filters [19,29,41], CAMs [12,40], or Aho-Corasick FSMs [18,22,39], and to match regexs with direct hardware synthesis [22,27] or FSMs [30]. For example, the parallel regex matching solution proposed by Lee et al [27] delivers a throughput of 550 Mbyte/s but supports only 25 rules, while Suresh et al [41] match exact patterns with a Bloom filter-based solution capable of delivering 2.25 Gbyte/s with 80-144 patterns.…”

Section: Related Workmentioning

confidence: 99%

Accelerating business analytics applications

Salapura

Karkhanis

Nagpurkar

et al. 2012

IEEE International Symposium on High-Performance Comp Architecture

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Business text analytics applications have seen rapid growth, driven by the mining of data for various decision making processes. Regular expression processing is an important component of these applications, consuming as much as 50% of their total execution time. While prior work on accelerating regular expression processing has focused on Network Intrusion Detection Systems, business analytics applications impose different requirements on regular expression processing efficiency. We present an analytical model of accelerators for regular expression processing, which includes memory bus-, I/O bus-, and networkattached accelerators with a focus on business analytics applications. Based on this model, we advocate the use of vector-style processing for regular expressions in business analytics applications, leveraging the SIMD hardware available in many modern processors. In addition, we show how SIMD hardware can be enhanced to improve regular expression processing even further. We demonstrate a realized speedup better than 1.8 for the entire range of data sizes of interest. In comparison, the alternative strategies deliver only marginal improvement for large data sizes, while performing worse than the SIMD solution for small data sizes.

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Section: Related Workmentioning

confidence: 99%

Accelerating business analytics applications

Salapura

Karkhanis

Nagpurkar

et al. 2012

IEEE International Symposium on High-Performance Comp Architecture

View full text Add to dashboard Cite

show abstract

“…FPGAs have been proposed to match exact patterns with Bloom filters [13,30,45], CAMs [6,44], or Aho-Corasick automata [11,20,43], and to match regular expressions with direct hardware synthesis [20,28] or DFAs [31]. Most of these solutions are fast enough for use in a Network Intrusion Detection System, which filters incoming traffic at wire speed (several Gbps of throughput), although they usually exhibit a very limited dictionary capacity.…”

Section: Related Workmentioning

confidence: 99%

Top-Performance Tokenization and Small-Ruleset Regular Expression Matching

Scarpazza

2010

Int J Parallel Prog

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In the last decade, the volume of unstructured data that Internet and enterprise applications create and consume has been growing at impressive rates. The tools we use to process these data are search engines, business analytics suites, natural-language processors and XML processors. These tools rely on tokenization, a form of regular expression matching aimed at extracting words and keywords in a character stream. The further growth of unstructured data-processing paradigms depends critically on the availability of high-performance tokenizers. Despite the impressive amount of parallelism that the multi-core revolution has made available (in terms of multiple threads and wider SIMD units), most applications employ tokenizers that do not exploit this parallelism. I present a technique to design tokenizers that exploit multiple threads and wide SIMD units to process multiple independent streams of data at a high throughput. The technique benefits indefinitely from any future scaling in the number of threads or SIMD width. I show the approach's viability by presenting a family of tokenizer kernels optimized for the Cell/B.E. processor that deliver a performance seen, so far, only on dedicated hardware. These kernels deliver a peak throughput of 14.30 Gbps per chip, and a typical throughput of 9.76 Gbps on Wikipedia input. Also, they achieve almost-ideal resource utilization (99.2%). The approach is applicable to any SIMD enabled processor and matches well the trend toward wider SIMD units in contemporary architecture design.

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“…In order to overcome the speed barrier, most of traditional implementations are targeted to specialized hardware like field-programming gate arrays (FPGA) [3][4][5][6][7][8][9] and application-specific instruction-set processors [10] . In contrast, multi-core architectures provide an opportunity to achieve high speed at a relatively low cost.…”

Section: Introductionmentioning

confidence: 99%

Revisiting Multiple Pattern Matching Algorithms for Multi-Core Architecture

Tan

Liu

et al. 2011

J. Comput. Sci. Technol.

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Due to the huge size of patterns to be searched, multiple pattern searching remains a challenge to several newly-arising applications like network intrusion detection. In this paper, we present an attempt to design efficient multiple pattern searching algorithms on multi-core architectures. We observe an important feature which indicates that the multiple pattern matching time mainly depends on the number and minimal length of patterns. The multi-core algorithm proposed in this paper leverages this feature to decompose pattern set so that the parallel execution time is minimized. We formulate the problem as an optimal decomposition and scheduling of a pattern set, then propose a heuristic algorithm, which takes advantage of dynamic programming and greedy algorithmic techniques, to solve the optimization problem. Experimental results suggest that our decomposition approach can increase the searching speed by more than 200% on a 4-core AMD Barcelona system.

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A CAM-based keyword match processor architecture

Cited by 8 publications

References 22 publications

Accelerating business analytics applications

Accelerating business analytics applications

Top-Performance Tokenization and Small-Ruleset Regular Expression Matching

Revisiting Multiple Pattern Matching Algorithms for Multi-Core Architecture

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