A complementary dynamic residue amplifier for a 67 dB SNDR 1.36 mW 170 MS/s pipelined SAR ADC

A 7.6b ENOB, 16× Gain, 360mVpp Output Swing, Open-Loop Charge Steering Amplifier

“…Because M9 (M8) in FIGURE 4 have the same size as M9' (M8'), V D1 and V D2 in FIGURE 4 (and in FIGURE 2 as well) are clamped to V 200 =200 mV. This constant V D1 and V D2 lead to a relatively constant g m of input transistors [see equation (10)] as well as a relatively constant voltage gain G diff [see equation (12)], even under process variations. FIGURE 5 shows the output common-mode feedback circuit.…”

Gain‐boosted dynamic amplifier for pipelined‐SAR ADCs

“…Introduction: For residue amplification in pipelined-successive approximation register (SAR) ADCs [1][2][3][4], open-loop dynamic amplifier architecture is attractive for its time domain, noise-averaging and zero static power features. The gain of a single-stage dynamic amplifier is generally determined by: (i) the gm/Id ratio of the input transistors and (ii) the common-mode (CM) voltage variation range ΔV CM .…”

“…A cascode dynamic amplifier [2] was proposed to achieve a high gain through a two-step discharging operation, but the gain is still limited by the linearity issue which comes from the charge leakage during the two-step conversions. A complementary dynamic amplifier [3,4] doubles the transconductance efficiency of the input transistors, while suffering more linearity issues from both PMOS and NMOS. Compared to a single-stage implementation, a twostage architecture [5] offers higher gain, but consumes more power.…”

“…The proposed dynamic amplifier uses less setting time than the conventional cascode dynamic amplifier [2], while overcoming its linearity issue. The gain of 32 is much larger than the former implementations [1][2][3][4][5], thus a larger first-stage SAR ADC can be used in the pipelined-SAR ADCs to achieve better energy efficiency [2].…”

High‐gain and power‐efficient dynamic amplifier for pipelined SAR ADCs

“…By having a complementary input and a reference level detector (RLD), a high gain, LNA is made possible. The proposed amplifier consumes less energy than other dynamic amplifiers [1][2][3][4][5], resulting in an improvement of the pipelined SAR ADC efficiency.…”