“…13,14 For this reason, several improvement techniques have been proposed to mitigate the DSDT issue while boosting the performance of the ultrascaled CNT-TFET. Particularly, we cite some approaches, which have been reported to improve the CNT-TFET at ultrascaled regime, namely, the use of p-n doping profile, 15 dielectric engineering, 16 doping engineering, 17,18 heterostructure engineering, 19 ungated region, 20 dual-material gate design, 21 and strain engineering. 22 Therefore, more approaches and improvements techniques should be proposed to increasingly boost the performance of ultrascaled CNT-based TFETs.…”