A current-based reference-generation scheme for 1T-1C ferroelectric random-access memories

An asymmetrical sensing scheme for 1T1C FRAM to increase the sense margin

“…In the scheme of Ref. [8] (see Fig. 2), current mirrors are used to mirror the currents converted from the readout voltages to a current sense amplifier.…”

“…2, a symmetrical current-based sensing scheme is proposed by Ref. [8], in which the bitline voltage is converted to current and is compared against a reference current (I 1 + I 0 //2, and the sense margin is (I 1 -I 0 //2. In this paper, an asymmetrical current-based sensing scheme to enlarge the sense margin of 1T1C FRAM is proposed.…”

“…Compared with the conventional symmetrical scheme in Ref. [8], the proposed scheme increases the sense margin of the readout current by 53.9% and decreases the sensing power consumption by 14.1%, at the cost of an additional 7.89% area of the sensing scheme. An experimental FRAM prototype utilizing the proposed asymmetrical scheme is implemented in a 0.35 m three metal process, in which the function of the prototype is verified.…”

A novel design of 0.25μm2.5 V 2T-2C sensing scheme for FeRAM

“…Figure 1 illustrates the two cells along with provisions for their data sensing [3]. A 2T-2C cell allows for both the data and its complement to be stored in the same cell, providing robustness to process variations and ease of sensing to data retrieval, moreover, the 2T-2C cell is self-referenced, storing the reference data (the data complement) alongside the data in the same cell, in every cell of the array.…”

Influence of crystallinity on the oxidation resistance of Ni–Al film used as diffusion barrier layer

“…The Pb(Zr,Ti)O 3 (PZT) thin film has been widely investigated due to favourable characteristics such as low coercive field, large remanent polarization [6][7][8]. In a one transistor-one capacitor (1T-1C) memory cell, a scheme in the high-density FeRAM, the drain must electrically contact with the bottom electrode of the ferroelectric capacitor stack [9,10]. If the PZT ferroelectric capacitor stack is directly integrated on Si, chemical reactions and interdiffusion between the bottom electrode and silicon during fabrication of the electrode film at a high temperature in oxygen atmosphere may generate a nonconducting layer, resulting in the failure of the memory cell due to the deterioration of the electric contact between the bottom electrode and silicon.…”