A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability

Barrett, Tim; Mediratta, S.D.; Kwon, Taek-Jun; Singh, Ravinder; Chandra, Sachit; Sondeen, J.; Draper, J.

doi:10.1109/iscas.2006.1692989

Cited by 2 publications

(2 citation statements)

References 5 publications

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“…Only the chunk size detection algorithm (in Section 4.3) needs to be adjusted depending on the programming model. Our proposed mechanism will also work well on NDP with conventional DRAM devices [7,12]. Processing cores in DDRx DIMMs benefit from accessing data in the same DIMM, but the host processor should utilize all DIMMs concurrently.…”

Section: Other Ndp Systemsmentioning

confidence: 97%

“…In graph computing, the number of vertices and their neighbors that each thread-block accesses depends highly on graph properties. To examine the impact of the graph properties on our proposed mechanism, we differentiate the properties that can be estimated at the time the graph is preprocessed 7 from those that cannot be estimated. Basic graph properties such as the number of vertices and edges can be obtained at the time the graph is preprocessed.…”

Section: Sensitivity To Graph Propertiesmentioning

confidence: 99%

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CODA: Enabling Co-location of Computation and Data for Near-Data Processing

Kim,

Hadidi,

Nai

et al. 2017

Preprint

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Recent studies have demonstrated that near-data processing (NDP) is an effective technique for improving performance and energy efficiency of data-intensive workloads. However, leveraging NDP in realistic systems with multiple memory modules introduces a new challenge. In today's systems, where no computation occurs in memory modules, the physical address space is interleaved at a fine granularity among all memory modules to help improve the utilization of processormemory interfaces by distributing the memory traffic. However, this is at odds with efficient use of NDP, which requires careful placement of data in memory modules such that neardata computations and their exclusively used data can be localized in individual memory modules, while distributing shared data among memory modules to reduce hotspots. In order to address this new challenge, we propose a set of techniques that (1) enable collections of OS pages to either be fine-grain interleaved among memory modules (as is done today) or to be placed contiguously on individual memory modules (as is desirable for NDP private data), and (2) decide whether to localize or distribute each memory object based on its anticipated access pattern and steer computations to the memory where the data they access is located. Our evaluations across a wide range of workloads show that the proposed mechanism improves performance by 31% and reduces 38% remote data accesses over a baseline system that cannot exploit computate-data affinity characteristics.

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Section: Other Ndp Systemsmentioning

confidence: 97%

Section: Sensitivity To Graph Propertiesmentioning

confidence: 99%

CODA: Enabling Co-location of Computation and Data for Near-Data Processing

Kim,

Hadidi,

Nai

et al. 2017

Preprint

View full text Add to dashboard Cite

show abstract

Characterizing data analysis workloads in data centers

Jia

Wang

Zhan

et al. 2013

2013 IEEE International Symposium on Workload Characterization (IISWC)

103

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Abstract-As the amount of data explodes rapidly, more and more corporations are using data centers to make effective decisions and gain a competitive edge. Data analysis applications play a significant role in data centers, and hence it has became increasingly important to understand their behaviors in order to further improve the performance of data center computer systems.In this paper, after investigating three most important application domains in terms of page views and daily visitors, we choose eleven representative data analysis workloads and characterize their micro-architectural characteristics by using hardware performance counters, in order to understand the impacts and implications of data analysis workloads on the systems equipped with modern superscalar out-of-order processors. Our study on the workloads reveals that data analysis applications share many inherent characteristics, which place them in a different class from desktop (SPEC CPU2006), HPC (HPCC), and service workloads, including traditional server workloads (SPECweb2005) and scale-out service workloads (four among six benchmarks in CloudSuite), and accordingly we give several recommendations for architecture and system optimizations.On the basis of our workload characterization work, we released a benchmark suite named DCBench for typical datacenter workloads, including data analysis and service workloads, with an open-source license on our project home page on http://prof.ict.ac.cn/DCBench. We hope that DCBench is helpful for performing architecture and small-to-medium scale system researches for datacenter computing.

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A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability

Cited by 2 publications

References 5 publications

CODA: Enabling Co-location of Computation and Data for Near-Data Processing

CODA: Enabling Co-location of Computation and Data for Near-Data Processing

Characterizing data analysis workloads in data centers

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