A dynamic threshold voltage MOSFET (DTMOS) for very low voltage operation

Abstract

Abstruct-A new mode of operation for Silicon-On-Insulator (SOI) MOSFET is experimentally investigated. This mode gives rise to a Dynamic Threshold voltage MOSFET (DTMOS). DTMOS threshold voltage drops as gate voltage is raised, resulting in a much higher current drive than regular MOSFET at low Vdd. On the other hand, Vt is high at V,, = 0, thus the leakage current is low. Suitability of this device for ultra low voltage operation is demonstrated by ring oscillator performance down to Vdd = 0.5 v.

Design of low power DTMOS based FCS and its notch filter application for ECG signals

“…Regular MOSFETs are converted to DTMOS by connecting the bulk and gate in standard CMOS manufacturing process [6,7]. DTMOS structure and its circuit symbol are shown in Figure 1.…”

“…In order to minimize leakage currents, threshold voltage cannot be held below a certain limit in regular MOSFETs [4,5]. As a result, dynamic threshold voltage MOSFET (DTMOS) structure offers an opportunity for ultra low voltage applications [6,7]. Floating Current Source structure has been firstly proposed as output stage of current-mode feedback amplifier (CFA) [8].…”

An Adaptive Body-Bias Generator for Low Voltage CMOS VLSI Circuits

“…Recently the substrate (body) of a MOSFET has been the subject of intensive research since body-biasing conditions benefit the CMOS chip design for low power applications [1][2][3]. The method can be applied in the designing of energy efficient physical nodes in wireless sensor networks [4].…”

“…Low threshold MOSFETs are used in critical paths of a CMOS circuit design and in non-critical paths, high threshold MOSFETs are used. Assaderaghi et al [3] have proposed a dynamic threshold MOSFET in which the body terminal is tied to the gate so that MOSFETs are forward body-biased when the transistor is ''on'' and reverse biased when the transistor is ''off''. In the reverse body-bias condition, the threshold voltage is increased, thus leakage current is reduced.…”

“…With the current trend of scaled down CMOS technology, therefore, reduction of the leakage current in a MOSFET has become an important issue. A few approaches have been reported to reduce the leakage current in a MOSFET [3,5] including the multi-threshold voltage process [5,6]. Low threshold MOSFETs are used in critical paths of a CMOS circuit design and in non-critical paths, high threshold MOSFETs are used.…”