A Faraday cage isolation structure for substrate crosstalk suppression

Wu, J.H.; Scholvin, Jörg; Alamo, J.A. del; Jenkins, K.A.

doi:10.1109/7260.959312

Cited by 42 publications

(21 citation statements)

References 12 publications

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“…We have exploited the high-aspect ratio of our substrate vias to demonstrate a novel Faraday cage isolation scheme to suppress substrate crosstalk [12]. The Faraday cage consists of a ring of substrate vias connected to the grounded backplane on the backside of the substrate and shorted together by a ring of metal on the frontside (Fig.…”

Section: A Motivationmentioning

confidence: 99%

“…Substrates had a resistivity of [10][11][12][13][14][15][16][17][18][19][20] cm. In the following paragraphs, we give details about each of the key process steps in our technology.…”

Section: Fabrication Technologymentioning

confidence: 99%

“…In exploring other practical applications, we have exploited this via technology to construct an innovative isolation scheme to reduce substrate crosstalk in mixed-signal circuits for system-on-a-chip (SOC) applications [12]. Early results of this technology characterized up to 6 GHz were published in [13].…”

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confidence: 99%

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A Through-Wafer Interconnect in Silicon for RFICs

Scholvin

Alamo

2004

IEEE Trans. Electron Devices

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Abstract-In order to minimize ground inductance in RFICs, we have developed a high-aspect ratio, through-wafer interconnect (or substrate via) in silicon that features a silicon nitride barrier liner and completely filled Cu core. We have fabricated vias with a nominal aspect ratio of 30 and verified the integrity of the insulating liner in vias with an aspect ratio of eight. The inductance of vias with nominal aspect ratios between three and 30 approach the theoretically expected values. This interconnect technology was exploited in a novel Faraday cage structure for substrate crosstalk suppression in system-on-chip applications. The isolation structure consists of a ring of grounded vias that surrounds sensitive or noisy portions of a chip. This Faraday cage structure has shown noise suppression of 30 dB at 10 GHz and 16 dB at 50 GHz at a distance of 100 m when compared to the reference structure.Index Terms-Ground inductance, Si RF technology, substrate noise, substrate via, system-on-chip (SOC), three-dimensional interconnects, through-wafer interconnect.

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Section: A Motivationmentioning

confidence: 99%

“…Substrates had a resistivity of [10][11][12][13][14][15][16][17][18][19][20] cm. In the following paragraphs, we give details about each of the key process steps in our technology.…”

Section: Fabrication Technologymentioning

confidence: 99%

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A Through-Wafer Interconnect in Silicon for RFICs

Scholvin

Alamo

2004

IEEE Trans. Electron Devices

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“…Substrate crosstalk between through wafer interconnects will become a significant barrier toward the enabling of silicon carrier based SiP. Several methods used to suppress substrate crosstalk include the use of high resistivity substrate [2][3] and isolation schemes such as faraday cages [4][5], metal-filled trenches [6] and porous silicon [7]. However, high resistivity silicon substrate is costly and isolation schemes occupies additional silicon footprint.…”

Section: Introductionmentioning

confidence: 99%

Development of coaxial shield via in silicon carrier for high frequency application

Rao

Khan

et al. 2006

2006 8th Electronics Packaging Technology Conference

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System-in-package (SiP) based on silicon carriers is a fast emerging technology that offers system design flexibility and integration of heterogeneous technologies. One of the key technologies enabler for silicon carrier is through wafer interconnects. The development of SiP will require the devices with different functionality operating at high frequency to be densely packed on the silicon substrate. However, silicon substrate is usually of low resistivity, when a high frequency signal is transmitted vertically through the substrate via, significant signal attenuation can occur that leads to substrate crosstalk and poor RF performance. In this paper, a novel coaxial shielded via in silicon carrier is presented for high frequency applications. Electrical modeling was carried out to obtain the required geometries for optimum performance. The coaxial shield via is able to suppress undesirable substrate crosstalk between vertical interconnects as well as provide excellent RF performance. The detailed fabrication process is also presented. A negative tone SU-8 photoresist is used as the dielectric for the coaxial shield via structure. A test vehicle is fabricated on 8-inch, 10 ·cm resistivity silicon wafer with a target of achieving a transmission coefficient, S 21 of greater than -0.5 dB at 40 GHz. SU-8 dielectric of approximately 112 µm thickness was deposited on the via sidewall of a 300 µm diameter through wafer via holes, and the via-holes filled with copper using bottom up electroplating approach to achieve a radius ratio, n of 4.

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“…Many solutions have been proposed to reduce coupling and cross talk including via hole fences [6,7], guarded ground tracks [8], step shaped transmission lines [9], and even faraday cages [10]. All of these approaches, however, use metals and can produce even more problems in the framework of a 3D system because the isolation structures themselves occupy space and limit how closely components can be placed.…”

Section: Introductionmentioning

confidence: 99%

Electromagnetic Isolation of a Microstrip by Embedding in a Spatially Variant Anisotropic Metamaterial

Rumpf¹,

Garcia

Tsang

et al. 2013

PIER

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Abstract-The near-field surrounding devices can be arbitrarily sculpted if they are embedded in a spatially variant anisotropic metamaterial (SVAM). Our SVAMs are low loss because they do not contain metals and are extraordinarily broadband, working from DC up to a cutoff. In the present work, a microstrip transmission line was isolated from a metal object placed in close proximity by embedding it in a SVAM so that the field avoided the object. Our paper begins by outlining a simple model for studying transmission lines embedded in SVAMs. We then present our design and experimental results to confirm the concept.

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A Faraday cage isolation structure for substrate crosstalk suppression

Cited by 42 publications

References 12 publications

A Through-Wafer Interconnect in Silicon for RFICs

A Through-Wafer Interconnect in Silicon for RFICs

Development of coaxial shield via in silicon carrier for high frequency application

Electromagnetic Isolation of a Microstrip by Embedding in a Spatially Variant Anisotropic Metamaterial

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