A Fast automatic frequency calibration (AFC) scheme for phase-locked loop (PLL) frequency synthesizer

Jeong, Chan-Young; Choi, Dongho; Yoo, Changsik

doi:10.1109/rfic.2009.5135609

Cited by 18 publications

(7 citation statements)

References 7 publications

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“…In this design, to lock the frequency of ADPLL, the 4b coarse bank of the DCO is controlled by auto frequency control (AFC) function [29]. However, even the frequency is locked, the gain of the narrow-range TDC will be almost 0 if large phase errors are presented.…”

Section: Coarse Pll Loopmentioning

confidence: 99%

A Sub-mW Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> ADPLL With FOM of −246 dB for IoT Applications

Liu

Tang

Sun

et al. 2018

IEEE J. Solid-State Circuits

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This paper presents a sub-mW fractional-N all-digital phase-locked loop (ADPLL) with scalable power consumption, which achieves an figure of merit (FOM) of −246 dB. The proposed 10-b ultralow-power isolated constant-slope digitalto-time converter (DTC) achieves a 580-fs resolution and a measured integral nonlinearity (INL) of 870 fs with 0.14-mW power consumption at 52 MS/s. A narrow-range time amplifier (TA)-time-to-digital converter (TDC) with gain calibration minimizes both the in-band phase noise degradation and the loop-bandwidth variation. In addition, a coarse-DPLL is introduced with dead-zone function, which reduces the phase lock time to 4.2 µs at a 13-MHz frequency error. The coarse-DPLL monitors large frequency and phase jump in the background while consuming almost zero power. In an ultralow power mode, the proposed fractional-N ADPLL consumes a 0.65-mW power with a 26-MHz reference. A rms jitter of 1.00 ps and −50-dBc in-band fractional spur are achieved with a −242-dB FOM. In high-performance mode, a reference doubler is utilized, the jitter and spurs can be improved to 535 fs and −56 dBc, respectively, while consuming 0.98 mW. The proposed ADPLL with scalable power and jitter performance can be utilized for Internet-of-Things (IoT) applications, such as Bluetooth low energy (BLE) and Wi-Fi networks.

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Section: Coarse Pll Loopmentioning

confidence: 99%

A Sub-mW Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> ADPLL With FOM of −246 dB for IoT Applications

Liu

Tang

Sun

et al. 2018

IEEE J. Solid-State Circuits

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“…For fast AFC operation while eliminating the uncertainty of the initial phase relationship between the reference clock and VCO output, two-phase reference clocks are employed [3]. For fast AFC operation while eliminating the uncertainty of the initial phase relationship between the reference clock and VCO output, two-phase reference clocks are employed [3].…”

Section: Introductionmentioning

confidence: 99%

“…This paper describes a fast AFC scheme which is applied to a 2-6 GHz complementary metaloxide-semiconductor (CMOS) frequency synthesizer. For fast AFC operation while eliminating the uncertainty of the initial phase relationship between the reference clock and VCO output, two-phase reference clocks are employed [3].…”

Section: Introductionmentioning

confidence: 99%

A fast automatic frequency calibration technique for a 2–6 GHz frequency synthesizer

Jeong¹,

Choi²,

Yoo³

2012

Circuit Theory & Apps

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A fast automatic frequency calibration (AFC) technique is described. For fast AFC operation while eliminating the uncertainty of the initial phase relationship between the reference clock and voltage-controlled oscillator output, two-phase reference clocks are employed. The proposed AFC scheme is applied to a 2-6 GHz frequency synthesizer. The frequency synthesizer is implemented in a 0.18 mm complementary metal-oxidesemiconductor process and occupies 0.92 mm 2 while the AFC occupies only 0.01 mm 2 . The AFC operation is completed in less than 1.6 ms.

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“…The large fluctuation of K vco will degrade the performance of PLL: Firstly the closed loop bandwidth of PLL will vary significantly over the tuning range, thus a programmable charge-pump is usually needed to compensate for the loop gain change with frequency [4]; Secondly the larger is the K vco , the more sensitive is the phase noise of PLL to the noise on the tuning line; Finally the switched capacitor array needs a calibration process to select a right sub-band before closed phase loop operation [5], if K vco is too low, the calibration time becomes long.…”

Section: Introductionmentioning

confidence: 99%

A wideband LC-VCO with small VCO-gain fluctuation for mobile DTV application

Gao

Yan

et al. 2011

Analog Integr Circ Sig Process

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A novel wideband LC-tuned VoltageControlled Oscillator (VCO) with small VCO-gain (K vco ) fluctuation was developed. A combination of parallel switched varactor array and switched capacitor array was introduced into conventional LC-tank, and both arrays are controlled by the same code and switched simultaneously.In this way small VCO-gain fluctuation was achieved and no additional calibration process of K vco was needed. The proposed resonator was applied to two wideband LC-VCOs implemented in a 0.25 lm CMOS technology for mobile DTV application. Each VCO achieves a K vco fluctuation of less than 16%, which is one-fourth of that in a conventional wideband LC-VCO, with a tuning range of more than 46%. The whole output frequency range is from 0.82 to 1.85 GHz, and the power consumption varies accordingly from 6.4 to 3 mA from a 2.5 V supply. The measured phase noise is -127 dBc/Hz at 1 MHz offset from a 1.17 GHz carrier.

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A Fast automatic frequency calibration (AFC) scheme for phase-locked loop (PLL) frequency synthesizer

Cited by 18 publications

References 7 publications

A Sub-mW Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> ADPLL With FOM of −246 dB for IoT Applications

A Sub-mW Fractional-<inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math> </inline-formula> ADPLL With FOM of −246 dB for IoT Applications

A fast automatic frequency calibration technique for a 2–6 GHz frequency synthesizer

A wideband LC-VCO with small VCO-gain fluctuation for mobile DTV application

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