A fast switched reluctance motor controller based on FPGA

Abstract

The paper presents the concept and practical implementation of a switched reluctance motor control system in an FPGA programmable device. The developed control system was designed for testing high-speed motors in order to limit the delays of output signals in relation to the signals from the encoder. The controller enables the values of commutation angles and PWM voltage to be set along with current limit values, measures the values of voltages and currents, and sends the results to the computer to be archived.

Automatic Word Length Selection with Boundary Conditions for HIL of Power Converters

“…In fact, X + Y, as stated in ( 9) and (10), will be always 1, so the total number of bits would be X + Y + 1 = 2 bits, including the sign. Such a minimum number of bits represents a signal with low resolution, so to obtain a reasonable resolution, more fractional bits have to be added.…”

“…Simulations from Y = 17 to Y = 29 show that RE drops to be around 4 × 10 −5 , a lower order of magnitude than in previous scenarios. That means that increasing 10 bits reduces the RE by only a factor of 10, when it should be reduced by 2 10 = 1024 if this were the only bottleneck. Therefore, the input-outputs that increased their WL in this case were part of the bottleneck, but not the only ones responsible for the system error.…”

“…HIL is commonly used as a testing process in different areas of power electronics [3][4][5][6][7][8][9]. Within this field, there are different studies on automatic control for electric drives [10,11] or power converters [12][13][14] implemented with FPGAs. In fact, there are many research studies on power converters using FPGAs because of their performance for mid-high switching frequencies [15,16].…”