This paper presents a proposal for a new type of regulator for switched reluctance motor (SRM) drives. The proposed regulator enables a significant extension of the rotational speed range and drive output power. This regulator is characterized by a complex structure, including two regulation modules: voltage and phase supply switch-on angle. The voltage module includes a proportional integral derivative (PID) voltage regulator. During its operation, the value of the phase supply switch-on angle and the width of the phase supply range are determined as a result of interpolation of the data previously determined in the simulation program. The other module contains the PID controller of the phase supply switch-on angle. The values of the angles included in the tables have been determined so as to ensure that the drive works with the greatest possible efficiency. The control method is determined based on the current operating parameters of the drive, i.e., torque and speed. The operation of the regulator was simulated in the MATLAB Simulink program. The regulator presented here was implemented in a field programmable gate array (FPGA). Tests of the regulator’s operation in the prototype system were carried out in the field of control of commutation angles.

The paper presents three rotor position detection modules implemented in FPGA devices. The modules are characterized by different methods of implementation and were developed for use with a switched reluctance drive. They operate in the following modes: sequentially synchronized with a clock signal, concurrently synchronized with a clock signal, and asynchronously. Simulated and measured delays introduced by these modules in the FPGA device are presented.

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The paper presents the concept and practical implementation of a switched reluctance motor control system in an FPGA programmable device. The developed control system was designed for testing high-speed motors in order to limit the delays of output signals in relation to the signals from the encoder. The controller enables the values of commutation angles and PWM voltage to be set along with current limit values, measures the values of voltages and currents, and sends the results to the computer to be archived.

Sterownik FPGA do badań napędów z przełączalnymi silnikami reluktancyjnymi Streszczenie. W artykule przedstawiono układ szybkiego sterownika przełączalnych silników reluktancyjnych (SRM), przeznaczonego do badań parametrów wysokoobrotowych napędów z tego typu maszynami. Sterownik wykonano w oparciu o układ FPGA, w celu ograniczenia czasu realizacji algorytmu sterowania i opóźnień sygnałów sterujących względem sygnałów wejściowych z czujnika położenia kątowego wirnika. Elementy peryferyjne podłączono do sterownika poprzez pętle prądowe w celu ograniczenia zakłóceń sygnałów sterujących. Układ wyposażono w czujniki pomiarowe napięcia i prądu, wykorzystywane w procesie sterowania, umożliwiające jednocześnie rejestrację przebiegów pomiarowych. Zaimplementowany interfejs komunikacyjny USB umożliwia zapis wyników pomiarów w komputerze.