A Fast-Switching Integrated Full-Bridge Power Module Based on GaN eHEMT Devices

Jørgensen, Asger Bjørn; Bęczkowski, Szymon; Uhrenfeldt, Christian; Petersen, Niels H.; Jørgensen, Solvejg; Munk‐Nielsen, Stig

doi:10.1109/tpel.2018.2845538

Cited by 79 publications

(47 citation statements)

References 34 publications

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“…In the X-Hall architecture, the active region is octagonally shaped (Fig. 1-b) and accessible by a total of 8 contacts: 4 large contacts (B, T, L, R) used to bias the probe, and 4 small contacts (1,2,3,4) used to sense the Hall voltage. In contrast to spun Hall sensor and due to the specific geometrical shape, the contacts of the X-Hall probe are dedicated to a single purpose (either biasing or sensing), so they can be optimized according to their specific function.…”

Section: A Topological Aspects Of the X-hall Probementioning

confidence: 99%

“…M. Crescentini, G. P. Gibiino, A. Romani, M. Tartagni and P. A. Traverso are with the Department of Electrical, Electronic and Information Engineering (DEI) "G. Marconi", Bologna and Cesena Campuses, University of Bologna, power devices [1], [2], which are able to operate at high frequencies and high power rates, and by the emerging of very fast response (VFR) applications, such as dynamic voltage scaling in microprocessors [3], [4] and high-frequency AC inverters [5]. In VFR applications, the power converter must be able to change the output voltage in the microsecond scale and beyond, requiring voltage and current measurements with very fine time resolutions.…”

Section: Introductionmentioning

confidence: 99%

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The X-Hall Sensor: Toward Integrated Broadband Current Sensing

Crescentini

Ramilli

Gibiino

et al. 2021

IEEE Trans. Instrum. Meas.

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This paper presents the X-Hall sensor, a viable sensing architecture for implementing a silicon-integrated, broadband, current/magnetic sensor. The X-Hall sensor overcomes the bandwidth limit of the state-of-the-art Hall sensors by replacing the spinning-current technique with DC-biasedbased, passive offset compensation. In this way, the X-Hall architecture removes the methodological bandwidth limit due to the spinning-current technique and allows for exploiting the Hall probe up to its practical limit, which is set by the parasitic capacitive effects. Moreover, the X-Hall architecture allows to push the practical bandwidth limit at higher frequencies due to both the removal of the switches inherent in the spinning-current approach and a specifically designed analog front-end. To this end, a differential-difference current-feedback amplifier (DDCFA) is proposed as analog front-end in the X-Hall sensor. A prototype of the proposed X-Hall architecture is implemented in BCD 0.16-µm silicon technology to experimentally assess the performance of the X-Hall architecture. The passive offset compensation implemented into the X-Hall architecture is frequency independent and preserves an adequate offset reduction performance, though less efficient than the spinning-current technique operated at low frequency. Experimental dynamic tests on the prototype identify the presence of an additive parasitic dynamic perturbation due to the package that prevents from fully exploiting the X-Hall prototype up to its designed bandwidth limit. However, the implementation of a post de-emphasis digital filter allows to mitigate for the dynamic perturbation and to experimentally achieve a sensor bandwidth of 4 MHz, which is the broadest bandwidth ever demonstrated by a purely Hall-effect based sensor.

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Section: A Topological Aspects Of the X-hall Probementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

The X-Hall Sensor: Toward Integrated Broadband Current Sensing

Crescentini

Ramilli

Gibiino

et al. 2021

IEEE Trans. Instrum. Meas.

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“…The PCB-embedded package with on-package capacitors is soldered onto a ceramic substrate. The hybrid assembly approach combining PCB embedding, a ceramic, and on-package passive components is also realized in [20] with external Sibased gate drivers and discrete GaN transistors. This letter embeds a GaN power IC, which provides a gate driver and other functionalities.…”

Section: Embedded Half-bridge Converter Operationmentioning

confidence: 99%

PCB-Embedded GaN-on-Si Half-Bridge and Driver ICs With On-Package Gate and DC-Link Capacitors

Moench

Reiner

Waltereit

et al. 2021

IEEE Trans. Power Electron.

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A low-inductive half-bridge and gate driver package with on-package gate and dc-link capacitors is realized by printed circuit board (PCB) embedding of two GaN-on-Si ICs. While monolithic half-bridge and driver integration reduces on-chip parasitics, it does not solve the interconnection challenge to external capacitors. This letter solves this issue through advantageous combination of PCB embedding and monolithic circuit integration. This letter uses GaN-on-Si power circuits with integrated gate drivers, freewheeling diodes, and temperature and current sensors. GaN ICs are fabricated with thick copper on both sides, which makes them applicable to commercial PCB-embedding technologies. Thermal aspects are discussed and electromagnetic simulations used to compare the PCB-embedded package to a bond wire based package. A PCB-embedded dc-dc converter is operated up to 350 V and 450 W with up to 98.7% efficiency. 380 V hard-switching transitions show below 8% over-and undershoot despite over 120 V/ns slew rates. Parallel platelike placement of silicon flip-chip capacitors above the gate driver final stage transistors and separated only by a thin PCB layer increased the gate-loop parasitic inductance by only 40 pH. Index Terms-Bridge circuits, driver circuits, gallium nitride, multichip modules, power integrated circuits, printed circuits, semiconductor device packaging.

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“…Compared with Silicones and Silicone Carbide (SiC) transistor, GaN transistors are more vulnerable to voltage overshoot for the limited voltage rating and gate threshold. As a result, PCB layout for GaN transistor must be optimized to minimize the parasitic loop inductance [4].…”

Section: Introductionmentioning

confidence: 99%

Multi-physic Analysis for GaN Transistor PCB Layout

Sun

Jørgensen

Zhang

et al. 2019

2019 IEEE Applied Power Electronics Conference and Exposition (APEC)

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PCB layout for Gallium Nitride (GaN) transistor power loops are critical for achieving a stable operation in power converters. Optimal design should minimize the parasitic inductance as well as provide a low thermal resistance for heat dissipation. A multi-physic evaluation of performance between different PCB designs are made and a novel layout is proposed in this paper. The parasitic inductance and heat distribution of each layout are compared. The parasitic inductance is obtained from the oscillation frequency of the transistor drain-source voltage ringing. The thermal comparison is done with a combination of measurements and calculations. To ensure identical operating conditions, the buck converter adopts a modular design idea, where the plug-in totem poles of different designs are placed on the same motherboard. An optimized strategy for GaN transistor layout is given.

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A Fast-Switching Integrated Full-Bridge Power Module Based on GaN eHEMT Devices

Cited by 79 publications

References 34 publications

The X-Hall Sensor: Toward Integrated Broadband Current Sensing

The X-Hall Sensor: Toward Integrated Broadband Current Sensing

PCB-Embedded GaN-on-Si Half-Bridge and Driver ICs With On-Package Gate and DC-Link Capacitors

Multi-physic Analysis for GaN Transistor PCB Layout

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