2012
DOI: 10.1109/jssc.2011.2180977
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A Fully-Integrated High-Power Linear CMOS Power Amplifier With a Parallel-Series Combining Transformer

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Cited by 62 publications
(24 citation statements)
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“…The performance of the designed PA is summarized and compared to previously reported power combining CMOS PAs with the balanced structure in Table IV. Comparing with references with ([2], [11]) or without ( [3], [8], [10]) power mode control, the PAE at back-offs from P 1-dB is distinctly improved. Reference [8] exhibits high peak drain efficiency, but the linear efficiency was not so good and the drain efficiency decreased sharply at back-off region.…”
Section: Measurement Resultsmentioning
confidence: 78%
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“…The performance of the designed PA is summarized and compared to previously reported power combining CMOS PAs with the balanced structure in Table IV. Comparing with references with ([2], [11]) or without ( [3], [8], [10]) power mode control, the PAE at back-offs from P 1-dB is distinctly improved. Reference [8] exhibits high peak drain efficiency, but the linear efficiency was not so good and the drain efficiency decreased sharply at back-off region.…”
Section: Measurement Resultsmentioning
confidence: 78%
“…It is worth noting that CMOS PAs, as low cost solution, still are good candidates for portable wireless applications [1,2,3]. It is certain that CMOS PAs need adopt kinds of techniques to overcome its high parasitic loss and low breakdown voltage [4].…”
Section: Introductionmentioning
confidence: 99%
“…In [14], a hybrid-type power-combining transformer, parallel-series combining transformer (PSCT) capable of combining four push-pull power stages with only 55% of the occupied area compared to the square-typed SCT with similar primary inductance was demonstrated. Nonetheless, the PSCT is still area consuming for the case of combining four push-pull power stages and occupies an area of 0.83 mm .…”
Section: Power-combining Transformers: Distributed Active Transfomentioning
confidence: 99%
“…Unfortunately, the problem becomes more severe in CMOS process, which has a low break down voltage of the transistor and lossy silicon substrate . The performance of the PA is critical to the overall system, so research on PAs continues and many designs for PAs in the CMOS process are still being reported and confirm their feasibility …”
Section: Introductionmentioning
confidence: 99%