A General Approach to Deadlock Freedom Verification for Software Architectures

Abstract

Abstract. When building complex software systems, the designer is faced with the problem of detecting mismatches arising from the activity of assembling components. The adoption of formal methods becomes unavoidable in order to support a precise identification of such mismatches in the early design stages. As far as deadlock freedom is concerned, some techniques appeared in the literature, which apply to formal specifications of software architectures under some constraints. In this paper we develop a novel technique for deadlock freedom verification that can be applied to arbitrary software architectures, thus overcoming the limitations of the previous techniques.

An Abstract Framework for Deadlock Prevention in BIP

“…If a component B i is modified, or is added to an existing system, then LDF C(a, ) only has to be re-checked for B i and components within distance of B i . A condition whose evaluation considers the entire system at once, e.g., [1,8,12] would have to be re-checked for the entire system. Easily Parallelizable.…”

“…No implementation, or complexity bounds, are given. Aldini and Bernardo [1] use a formalism based on process algebra. They check deadlock by analysing cycles in the connections between software components, and claim scalability, but no complexity bounds are given.…”

Generating well-synchronized multithreaded programs from software architecture descriptions

“…For a complete evaluation of the approach, further case studies -besides the audio processing system -have to be carried out, so that indicators like the average percentage of code that can be automatically generated and its impact on the system efficiency can be assessed. For the future we plan to extend the approach in order to take into account the automatic generation of the thread behavior as well, to investigate to what extent the properties proved at the architectural level by means of the analysis techniques for PADL described in [5,1] are preserved by the automatically generated code, and to integrate the approach in the software tool TwoTowers [4].…”

“…In order to apply the approach to the real-time audio processing system illustrated above, we supply a high level description of the software system expressed in some ADL. Here we choose the new version [1] of PADL [5], as it conforms to the adopted synchronization model. Every PADL specification is composed of two sections.…”

“…In the literature, several architectural description languages (ADLs) have appeared, most of which are based on process algebra (see, e.g., [3,8,6,5]). Among them, we choose the new version of PADL [1], as its synchronization model is very close to the adopted one. The idea is to automatically generate the multithreaded Java program from its architectural description in PADL, in such a way that all the synchronization details are transparently and correctly managed via Sync.…”