A Generic Method to Develop a Defect Monitoring System for Ic Processes

Bruls, E.M.J.G.; Camerik, F.; Kretschman, H.J.; Jess, J.A.G.

doi:10.1109/test.1991.519513

Cited by 16 publications

(8 citation statements)

References 19 publications

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“…The more test structure lines are connected, the larger the defect will be. So far, the limitation of pads requires serpentine test structure lines to fill the complete test chip area [15]. But, if more than two serpentine lines are connected, it is difficult to say whether there is just one large defect or some small defects have caused a multiple fault.…”

Section: Design Principle Of the Harp Test Structure (Hts)mentioning

confidence: 99%

Harp test structure to electrically determine size distributions of killer defects

Hess¹,

Weiland²

1998

IEEE Trans. Semicond. Manufact.

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To improve accuracy of electrically based measurements of defect densities and defect size distributions, we present a novel Harp Test Structure (HTS). There, horizontal and vertical parallel lines will be placed inside a given boundary pad frame without using any additional active semiconductor devices. The enhanced two-dimensional (2D) permutation sequence provides that all neighborhood relationships of adjacent test structure lines are unique. This is the key to disentangle even multiple faults detected by fast digital measurements. For this reason, the number and size of individual defects will be extracted anywhere inside or in-between layers. Experimental results show, that not only optical measurements, but also electrical measurements at a Harp Test Structure are sufficient to get a precise defect size distribution that enables size distribution modeling for yield prediction.

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Section: Design Principle Of the Harp Test Structure (Hts)mentioning

confidence: 99%

Harp test structure to electrically determine size distributions of killer defects

Hess¹,

Weiland²

1998

IEEE Trans. Semicond. Manufact.

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“…A well-known defect monitor traditionally used for detecting bridging and open defects is the comb-meander-comb structure [9]. It is basically a long meander-shaped wire as shown in Fig.…”

Section: Open Defects In Monitor Structuresmentioning

confidence: 99%

“…Furthermore, an accurate critical area model for random defects is a key issue for the estimation of yield loss sensitivity of products to such random failure mechanisms [7]. Traditionally, conventional test monitors such as the comb-meander-comb structure [8], [9] have been used to characterize the resistive distribution of open defects [10] and bridging defects [11], both of which are the main contributors to yield loss in wiring structures.…”

Section: Introductionmentioning

confidence: 99%

Localization and Electrical Characterization of Interconnect Open Defects

Rodriguez-Montaes

Arumí

Figueras

et al. 2010

IEEE Trans. Semicond. Manufact.

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“…In order to measure values for the bridge resistance, Rb, a defect monitor structure for a CMOS pilot line has been used, the VMX monitor [17]. The design consists of three basic modules made of a conducting material, each one containing a comb-string-comb structure, as shown in Fig.…”

Section: Defect Detectionmentioning

confidence: 99%

“…The VMX monitor permits the identification of a class of small bridges [ 17]. These small bridges are defined as the bridges that make a connection between exactly two separate conducting structures.…”

Section: Bridge Resistance Estimationmentioning

confidence: 99%

Bridging defects resistance in the metal layer of a CMOS process

1996

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The resistance value of bridging defects in CMOS VLSI circuits are evaluated through a set of measurements performed on process-related defect monitoring wafers. The monitor circuits considered are made of metall lines. The results show how the vast majority of the measured metall to metall bridges has a low resistance. Only a small percentage of the overall bridges resulted in a resistance value above 500 f2, while the exact percentage can vary from batch to batch. This high resistance does not seem to be the result of the material of the defect itself, since all these bridging defects were found to be caused by extra aluminium. The shape and location of the defect seem to be the cause of the high resistance values probably caused by poor contacts between the extra metal and the designed monitor lines.

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A Generic Method to Develop a Defect Monitoring System for Ic Processes

Cited by 16 publications

References 19 publications

Harp test structure to electrically determine size distributions of killer defects

Harp test structure to electrically determine size distributions of killer defects

Localization and Electrical Characterization of Interconnect Open Defects

Bridging defects resistance in the metal layer of a CMOS process

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