A high accuracy high throughput jitter test solution on ATE for 3GBPS and 6gbps serial-ata

Fan, Yongquan; Cai, Yi; Žilić, Željko

doi:10.1109/test.2007.4437594

Cited by 5 publications

(2 citation statements)

References 13 publications

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“…In the target environment, real-time embedded system debugging and testing has traditionally become difficult and time-consuming due to the inherent absence of internal system visibility [37]. Furthermore, as the need for increased bandwidth grows, high-speed serial interfaces (HSSI) are being pushed toward larger data rates [38]. Postsilicon validation, testing, and debugging of HSSI has made it more crucial to maintain the design and device quality with the coinciding increase in the complexity of the design and decrease in the timing budget [39].…”

Section: Related Workmentioning

confidence: 99%

A Knowledge Base Technique for Detecting Multiple High-Speed Serial Interface Synchronization Errors in Multiprocessor-Based Real-Time Embedded Systems

et al. 2022

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The heterogeneity of the multiple processing elements (PEs) is a feature of real-time embedded systems. General-purpose processors and several embedded processors, as well as dedicated high-speed interfaces, are among these elements. Communication between the processors is among the most significant characteristics of developing such complex systems. Furthermore, synchronization is a common issue during interprocessor communication in embedded systems. Debugging and testing such systems is time-consuming, difficult, and laborious, with the majority of the complexities centered on debugging real-time interprocessor communication, such as synchronization in terms of timing and accuracy. While the hardware design features of heterogeneous multiprocessor real-time embedded systems have received a lot of attention, the design and development of software-based solutions still have the potential to be addressed. In particular, software-based testing becomes challenging due to interprocessor communication and the synchronization of real-time applications. A knowledge-based technique that aids in testing high-speed serial interfaces in multiprocessor-based real-time embedded systems is proposed that needs debugging in real time while an application is running. It is becoming much more important to test and validate these interfaces in real time as the demand for high data transmission rates increases. The presented work uses a technique to simulate, create and enhance the knowledge base used as correlation-based error detection that reduces the development time. The proposed technique helps in detecting synchronization-related errors that occur during communication among multiple high-speed serial interfaces. The presented work also lists a series of experiments to validate the effectiveness of the proposed technique. The results show that the presented techniques are effective for error identification in real-time embedded systems.

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Section: Related Workmentioning

confidence: 99%

A Knowledge Base Technique for Detecting Multiple High-Speed Serial Interface Synchronization Errors in Multiprocessor-Based Real-Time Embedded Systems

et al. 2022

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“…/DJ Measurement on Frequency DomainFor RJ/DJ measurement in frequency domain, the samples capturing phase is same as Timing domain approach does. The difference is in the calculation phase which is introduced in[3].…”

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confidence: 99%

Fast Jitter Test Solutions of High-Speed IO Based on Timing and Frequency Domain

Ming¹

2012

ECS Trans.

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To quantify the transmission quality of HSIO with high-level confidence is the big challenge in front of SOC ATE test engineers. The mainstream approaches can be separated into 3 types: BIST loopback, golden device and fast eye-mask test. All these 3 approaches cannot meet the strict specifications of the leading-edge high-speed device which need random jitter and deterministic jitter separation. This paper introduces one fast jitter test solution which can get accurate RJ/DJ value from either timing domain or frequency domain. This solution has been implemented in production of real devices and the result shows its high accuracy.

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Accelerating jitter tolerance qualification for high speed serial interfaces

Fan

Žilić

2009

2009 10th International Symposium on Quality Electronic Design

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A high accuracy high throughput jitter test solution on ATE for 3GBPS and 6gbps serial-ata

Cited by 5 publications

References 13 publications

A Knowledge Base Technique for Detecting Multiple High-Speed Serial Interface Synchronization Errors in Multiprocessor-Based Real-Time Embedded Systems

A Knowledge Base Technique for Detecting Multiple High-Speed Serial Interface Synchronization Errors in Multiprocessor-Based Real-Time Embedded Systems

Fast Jitter Test Solutions of High-Speed IO Based on Timing and Frequency Domain

Accelerating jitter tolerance qualification for high speed serial interfaces

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