A high-C capacitor (20.4 fF/ mu m/sup 2/) with ultrathin CVD-Ta/sub 2/O/sub 5/ films deposited on rugged poly-Si for high density DRAMs

Abstract

Storage capacitors integrating ultrathin Chemical VaporDep~ sited-T%Os (10 to 15 nm thick) on Rapid Thermal Nitrided rugged polycrystalline silicon electrodes are proposed for 256 Mb stacked Dynamic Random Access Memory applications. The unique combination of this high dielectric constant m a t e d with a rugged Hemispherical Grain silicon electrode allows the manufactureof the ultra high capacitance (20.4 fF/pm2) stacked structures needed beyond 64 Mb.

Cosmic and terrestrial single-event radiation effects in dynamic random access memories

“…A so-called rugged cylindrical polysilicon capacitor further increases capacitance surface area via an uneven polysilicon surface-hemispherical-grained (HSG) silicon deposited by LPCVD, shown in Fig. 10(b) [51], [52]. In addition, hi-dielectric-constant Ta205 films are used as the capacitor insulator.…”

“…As device dimensions continue to scale, however, there are questions as to the vulnerability of the polysilicon capacitor region . Cylindrical stacked capacitor cell structures [after [50] (a) and [51] (MCO) effect in stacked DRAM device structures [53]. Unlike charge collection by drift or diffusion near an active silicon junction, the MCO effect is caused by an increase in the minority carrier charge density within the polysilicon capacitor plate.…”

Dry oxidation resistance of ultrathin nitride films: Ordered and amorphous silicon nitride on Si(111)

“…3,4 The use of such silicon nitride ultrathin films in memory applications is also under consideration primarily for high dielectric constant capacitor dielectrics where a suitable chemical reaction barrier is required between silicon and the dielectric to avoid oxidation of the silicon. [10][11][12][13][14][15][16][17][18][19] For microelectronic applications, the tunneling leakage current through such ultrathin films is also an important consideration. The Ta 2 O 5 precursor deposition and post-anneal processes are known to result in silicon oxide formation at the polycrystalline-Si/Ta 2 O 5 interface thus resulting in a capacitance dominated by SiO 2 .…”

Morphology and Integration of Rough Polycrystalline Silicon Films for DRAM Storage Cell Applications

“…Advanced dynamic random access memory (DRAM) design and fabrication is continually challenged with providing sufficient charge-storage capacity in a small cell area. Some of the methods to increase cell capacitance are implementation of three-dimensional cell designs such as block, fin, or crown cell structures, application of high dielectric constant materials such as silicon nitride/oxide (NO) or tantalum pentoxide (Ta 2 O 5 ) [1][2][3][4] and use of rough textured electrode to increase the effective surface area of the storage cell. [5][6] The rough textured polysilicon film shows a hemispherical grain-like structure which increases the surface area of the storage cell without affecting the cell area and the storage node height.…”