A high resolution Serializer and Deserializer architecture for mobile image sensor module

Abstract

This paper describes a new Serializer and Deserializer (SerDes) architecture for mobile camera serial interface CMOS image sensor module. This new SerDes architecture enables the effective transmission of digital packet with a timing controller. For the effective serializing and deserializing operations, we adopted the multiplexing technique with a Double Data Rate (DDR) process. By this technique, we can reduce the clock periods by half. The proposed SerDes structure with its transceiver was fabricated using 0.18um CMOS technology. This proposed circuit was verified by using a Mega pixel Mobile Display Digital Interface (MDDI) Image Sensor Module (ISM) at 500Mbps and also tested over this data rate. And this circuit shows low power consumption of 14mW at the supply voltage of 1.8 V.