A high-speed, high-sensitivity silicon lateral trench photodetector

Yang, Min; Rim, K.; Rogers, Derek J.; Schaub, J.D.; Welser, J.J.; Kuchta, Daniel M.; Boyd, D.; Rodier, Françis; Rabidoux, Paul A.; Marsh, James T.; Ticknor, Adam; Yang, Qingyun; Upham, A.; Ramac, Samuel

doi:10.1109/led.2002.1015212

Cited by 36 publications

(6 citation statements)

References 10 publications

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“…However, since the aperture size is limited by the depletion layer width, it is necessary to stack multiple chips to increase the photosensitive area. Trench-based photosensors have also been reported: a p-i-n photodetector with a 7-µm-deep trench electrode on a 11-16 Ωcm p-type silicon substrate has been reported [22]. However, it has a shallow trench depth of 7 µm, which results in a depletion layer thickness of about 20 µm and a low 1 µm near-infrared absorption rate of at most 12%.…”

Section: Introductionmentioning

confidence: 99%

Silicon Near-Infrared Sensor Using Trench Photodiode Array

Arima

2021

IEEE Access

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In this paper, we report a method of increasing the sensitivity of a silicon near-infrared sensor. The sensor is realized by forming multiple trench-type photodiodes in a silicon chip. The trench photodiodes can be formed using conventional semiconductor fabrication equipment. The device structure allows the depletion layer to be spread over the entire sensor chip even at a bias voltage of 10 V or less. The sensor chip can thereby extend the collection area of photoelectrons to the maximum. At a chip thickness of 540 µm, the conversion efficiency for near-infrared wavelengths between 940 and 1020 nm is more than 80% at room temperature. In addition, the electrical characteristics and response performance of the fabricated 2.4 mm × 2.4 mm test chips are reported. Since the proposed method can achieve a high conversion efficiency at low voltage without cooling in silicon semiconductors, it is expected to provide a low-cost and compact solution for various near-infrared receiver devices such as these for Internet of Things (IoT) applications.

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Section: Introductionmentioning

confidence: 99%

Silicon Near-Infrared Sensor Using Trench Photodiode Array

Arima

2021

IEEE Access

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“…[27][28][29] Simultaneously, detectors can be designed in a vertical configuration to improve their bandwidths as mentioned above, but a lateral structure is more preferred as it is suitable for integration of the p-i-n PDs with MOSFETs. The interdigitated configuration of lateral p-i-n PDs can be formed on a low-doped Si substrate, 11,18,30,31) which is employed to maximize the depleted regions available for high-speed drift carrier collection. However, it increases the diffusion current from the substrate and the parasitic effects due to the diodes in lateral arrangements.…”

Section: Introductionmentioning

confidence: 99%

Over 10 GHz lateral silicon photodetector fabricated on silicon-on-insulator substrate by CMOS-compatible process

Maekita

Mitsuno

et al. 2015

Jpn. J. Appl. Phys.

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We report a design and implementation of lateral silicon photodetectors fabricated on a silicon-on-insulator (SOI) substrate in a complementary CMOS-compatible process. In addition, we disscuss the structure dependences on the frequency and optimum design for a maximum bandwidth. A standard device fabricated with a 210 nm absorbing layer, a finger width of 1.00 µm, a finger spacing of 1.63 µm, a square detector area of 20 × 20 µm2, and a pad size of 60 × 60 µm2 achieved a bandwidth of 12.6 GHz at a bias voltage of 10 V, with a responsivity of 7.5 mA/W at 850 nm wavelength. A photodetector with the same geometry, which was fabricated with a smaller pad size of 30 × 30 µm2, exhibited a bandwidth of 13.6 GHz.

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“…Similar objections can be applied to the OEICs integration in BiCMOS technologies, where higher reverse biased voltage (V ac ) is sometimes applied (up to 12 V). 3) An innovative approach was presented by Yang et al, 4) implementing lateral trench photodetectors. The vertical extension of the PIN structure allows high speed and sensitivity in a wide range.…”

Section: Introductionmentioning

confidence: 99%

Super-Junction PIN Photodiode to Integrate Optoelectronic Integrated Circuits in Standard Technologies: A Numerical Study

Roig

Stefanov

Morancho

2007

jjap

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The use of super-junction (SJ) techniques in PIN photodiodes is proposed in this letter for the first time with the objective to assist the optoelectronic integrated circuits (OEICs) implementation in complementary metal oxide semiconductor (CMOS), bipolar CMOS (BiCMOS) and bipolar-CMOS-double diffused MOS (BCD) technologies. Its technological viability is also discussed to make it credible as an alternative to other OEICs approaches. Numerical simulation of realistic SJ-PIN devices, widely used in high power electronics, demonstrates the possibility to integrate high-performance CMOS-based OEICs in epitaxial layers with doping concentrations above 1 Â 10 15 cm À3 . The induced lateral depletion at low reverse biased voltage, assisted by the alternated N and P-doped pillars, allows high-speed transient response in SJ-PIN detecting wavelengths between 400 and 800 nm. Moreover, other important parameters as the responsivity and the dark current are not degraded in respect to the conventional PIN (C-PIN) structures.

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A high-speed, high-sensitivity silicon lateral trench photodetector

Cited by 36 publications

References 10 publications

Silicon Near-Infrared Sensor Using Trench Photodiode Array

Silicon Near-Infrared Sensor Using Trench Photodiode Array

Over 10 GHz lateral silicon photodetector fabricated on silicon-on-insulator substrate by CMOS-compatible process

Super-Junction PIN Photodiode to Integrate Optoelectronic Integrated Circuits in Standard Technologies: A Numerical Study

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