A high-speed ic random-number source for smartcard microcontrollers

Bucci, Marco; Germani, L.; Luzzi, R.; Tommasino, Pasquale; Trifiletti, Alessandro; Varanonuovo, M.

doi:10.1109/tcsi.2003.818610

Cited by 55 publications

(24 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Currently, there exist several technically useful sources of randomness. They are: noise generated by a physical system [1]- [5], metastable states [7]- [11], the chaos phenomenon [12]- [20] or jitter produced by ring oscillators [21]- [30]. Mixed solutions that combine various properties of these basic techniques also exist.…”

Section: Introductionmentioning

confidence: 99%

A Random Number Generator Using Ring Oscillators and SHA-256 as Post-Processing

Łoza¹,

Matuszewski²,

Jessa³

2015

International Journal of Electronics and Telecommunications

View full text Add to dashboard Cite

Abstract-Today, cryptographic security depends primarily on having strong keys and keeping them secret. The keys should be produced by a reliable and robust to external manipulations generators of random numbers. To hamper different attacks, the generators should be implemented in the same chip as a cryptographic system using random numbers. It forces a designer to create a random number generator purely digitally. Unfortunately, the obtained sequences are biased and do not pass many statistical tests. Therefore an output of the random number generator has to be subjected to a transformation called postprocessing. In this paper the hash function SHA-256 as postprocessing of bits produced by a combined random bit generator using jitter observed in ring oscillators (ROs) is proposed. All components -the random number generator and the SHA-256, are implemented in a single Field Programmable Gate Array (FPGA). We expect that the proposed solution, implemented in the same FPGA together with a cryptographic system, is more attack-resistant owing to many sources of randomness with significantly different nominal frequencies. analog random number generator in one microchip in order to be used in encryption/decryption process in dedicated solutions. Most of cryptographic systems are digital constructions. Therefore, it is expected that random number generators should be purely digital constructions, simply integrated in one chip. Nowadays there is a trend to find in digital circuits some behaviors or methods that will give possibility to produce random bit sequences "on demand", with high bit rate, without any possibility to having access to elements of these sequences. It is proposed to use generators with jitter, constructed by using reprogrammable digital circuits or constructions based on meta-stability [31], [32]. Because the latter phenomenon, although interesting, is rather impractical for producing random bits in contemporary FPGAs [33], the most significant are concepts using ring oscillators or Galois Ring Oscillators (GARO). In both approaches jitter is used for signal generation [27], [31]. Random bit sequence is obtained by sampling signal generated by RO or GARO with rectangular wave with lower frequency. To obtain unbiased sequence that pass all known statistical tests for random sequences, e.g. NIST 800-22 test suite, Diehard, TestU01 or UC1, we need to combine bit streams produced by many RObased random bit generators [34]- [39]. The ring oscillators must also have significantly different nominal frequencies to prevent the injection attack [40]. It forces to use delay lines built into FPGAs instead of inverters or latches [39]. KeywordsTo decrease the number of RO-based random bit generators necessary to pass all statistical tests, it is proposed in this paper to use SHA-256 hash function as post-processing. Both elements -RBG and SHA-256, were implemented in the same Virtex 5 FPGA (XL5VLX50T). Through experiments it has been shown that the minimal number of ROs that should be used for building a random ...

show abstract

Section: Introductionmentioning

confidence: 99%

A Random Number Generator Using Ring Oscillators and SHA-256 as Post-Processing

Łoza¹,

Matuszewski²,

Jessa³

2015

International Journal of Electronics and Telecommunications

View full text Add to dashboard Cite

show abstract

“…However, by proper seeding of a PRNG from a reliable source [4] sufficient entropy could be obtained for generating truly random numbers. On the other hand, True Random Number Generators (TRNGs) produce random streams from a nondeterministic natural source; electronic noise and radio active decay are two examples of usable processes [5].…”

Section: Introductionmentioning

confidence: 99%

A high speed IC Random Number Generator based on phase noise in ring oscillators

Giiler¹,

Ergiin²

2010

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

View full text Add to dashboard Cite

There is an increasing demand for fully digital, high speed Random Number Generators because of their speed compatibility and uncomplicated integration to digital platforms. To the best of our knowledge, this paper presents the first ASIC implementation of Random Number Generator based on ring oscillators. Prototypes have been designed and fabricated by using HHNEC's 0.25 µm eFlash process with a supply voltage of 2.5V. The circuit occupies 0.043 mm 2 and dissipates minimum 0.011 W of power. IC design level experiences, measurements, analyses of measurements and statistical test results are also demonstrated. Instead of resilient function which decreases the throughput, we propose to use only a simple Von Neumann corrector, thus 4 times faster throughput can be obtained in comparison with the previous design in which resilient function is employed. We achieved fullfilled test results from NIST 800-22 test suit after Von Neuman corrector with 16.5 M bps throughput which is the highest data rate to date with fullfiled test results. The results were repeatable numerous times.

show abstract

“…Four different techniques for generating random streams are reported in the technical literature: direct amplification of a noise source [5]- [7], jittered oscillator sampling [8]- [12], discrete-time chaotic maps [13], [14] and metastable circuits [15], [16].…”

Section: Introductionmentioning

confidence: 99%

Fully Digital Random Bit Generators for Cryptographic Applications

Bucci

Luzzi

2008

IEEE Trans. Circuits Syst. I

Self Cite

View full text Add to dashboard Cite

This paper is devoted to the analysis, implementation, and modeling of fully digital random bit generators based on recent research results on the design of stateless oscillator-based generators. A new approach to the data quality test is adopted where, instead of passing bunches of statistical tests on the raw data, the focus is on the verification of a minimum entropy limit for the delivered random numbers after the digital post-processing. The architecture of the proposed generator (noise source and post-processing algorithm) is described in detail and experimental results in a 90-nm CMOS process are reported. The fabricated device reaches a throughput of 1.74 Mb/s after post-processing with an area of 13000 m 2 and a power consumption of about 240 W when running at its maximum speed. A statistical model for the noise source is provided and the entropy of the post-processed data has been evaluated obtaining an entropy per byte higher than 7.999.

show abstract

A high-speed ic random-number source for smartcard microcontrollers

Cited by 55 publications

References 12 publications

A Random Number Generator Using Ring Oscillators and SHA-256 as Post-Processing

A Random Number Generator Using Ring Oscillators and SHA-256 as Post-Processing

A high speed IC Random Number Generator based on phase noise in ring oscillators

Fully Digital Random Bit Generators for Cryptographic Applications

Contact Info

Product

Resources

About